JPS58164257A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a resistance circuit network which has high integration and high accuracy by alternately arranging the first and second polysilicon resistors insulated from each other on an insulating film of an Si substrate and connecting the resistors equally in number. CONSTITUTION:The first polysilicon unit resistors 5 are formed by a photoetching method on an oxidized film 8 on an Si substrate 10, an oxidized film 9 is covered, and the second polysilicon unit resistors 6 are similarly formed. Accordingly, the resistors of approx. double in number can be formed on the same area. Windows 7 are opened, and lead conductors 1-3 and mutually connecting conductors 4 are then formed. Since the unit resistors are equal in number even if the variation in the resistor is independently produced due to different impurity diffusion amounts of the first and second polysilicons, the ratio of the resistance values can be maintained constantly. The time constant of the CR is controlled by the diffusion of the impurity, thereby forming a CR filter having high integration and high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device including a resistor network.

In recent years, the field of application of semiconductor devices has been expanding at a remarkable pace, and semiconductor devices are rapidly penetrating fields that require sufficient precision using conventional individual components or adjustment techniques.

As an example of this, consider the field of analog-to-digital conversion signal processing, where analog signals are converted into digital signals. After modulation), the amplitude is converted into a digital signal without being quantized. For this reason, an analog-to-digital conversion circuit requires a sample-and-hold circuit.

When converting an analog signal into a digital signal by sampling and holding it at a certain period, it is necessary to limit the band of the input analog signal using a filter to prevent repeat distortion in order to ensure the accuracy of the conversion system. Become.

For example, when converting a phantom analog signal to a digital signal, Fi...? According to the sampling theorem, the sampling period is 128μ5ec (sampling frequency gKHz
) is the minimum period. That is, for rounding to avoid aliasing distortion, it is necessary to band limit the input analog signal.

For this purpose, the technology that has been used for semiconductor devices is to use polycrystalline silicon, diffused resistors as resistors, insulators as dielectrics, and capacitances. It is normal to do 6 to 9.

In order to increase the 01 time constant and extend the operating frequency of the filter to a low frequency range, the resistance value R of the resistor is increased, but it is clear that the only option is to increase the capacitance C.

Conventionally, this objective has been achieved by increasing the area of the resistor to increase the resistance value or increasing the capacitance area, and it has been necessary to increase the semiconductor area. A ninth way to avoid this is to reduce the amount of impurities that diffuse into polycrystalline silicon and use a high-quality paper antibody, but since the sheet resistance of such resistors is extremely large), it is difficult to control this variation. It is not easy to increase the unit volume value.Although it is possible to increase the unit volume value by reducing the thickness of the capacitive dielectric, there is a limit to how much it can be increased if manufacturing errors are taken into account9.

Ota. It is also possible to use good paper antibodies using the P-fer and Nf)-ru regions used in CMO8, but these resistors have a large voltage-to-resistance coefficient and a large O9 junction capacitance. , which has the disadvantage of deteriorating frequency characteristics.

The present invention is free from such drawbacks, minimizes semiconductor area,
To provide a semiconductor device which is extremely effective in expanding the field of application of semiconductor devices, in which an excellent paper antibody with a ratio of *1 can be constructed using a plurality of polycrystalline silicon units and a group of unit resistors. With the goal.

The present invention relates to a first film on an insulating film formed on a silicon substrate.
a first resistor group made of polycrystalline silicon; and a second resistor group formed with the first polycrystalline silicon via an insulating material.
a second resistor group made of polycrystalline silicon;
A composite resistor is formed in which a second resistor group is formed at each of the first resistor groups, p-interconnection is performed by an interconnection conductor, and the first and second resistor groups have the same number of interconnections. There is a semiconductor device characterized by having at least two or more pairs.

The present invention 911 will be explained in detail below using examples.

The present invention significantly reduces the area of a semiconductor device by combining a first polycrystalline silicon to be used as a first resistor layer and a second polycrystalline silicon to be used as a second resistor layer. The first embodiment is characterized in that sensitivity to variations due to manufacturing of the composite resistor can be minimized. (1) is a plan view of the first embodiment of the present invention, and 1wJΦ) is a sectional view of the X++X/ section in FIG. 1(a).

In FIG. 1, a first polycrystalline silicon unit resistor 5 and a first polycrystalline silicon unit resistor formed on an oxide film 8 formed on a silicon substrate 10 by thermal oxidation are photographically engraved. The oxide film 9 is patterned using a technology and thermally oxidized.
form. Furthermore, a second polycrystalline silicon unit resistor is formed in the same manner as the first polycrystalline silicon unit resistor. After that, connect contact 7 and pull out conductors 1.2 and 3.
and an interconnection conductor 4]. &O, in the theory of Figure 1 @, the first and second
The explanation that impurity diffusion is performed in polycrystalline silicon is omitted, but this can be done or not.
However, in order to control the 01 time constant, impurity diffusion is usually performed.

By adopting the configuration shown in Figure 1, there is no need for the spacing required to prevent short circuits due to whiskers of polycrystalline silicon, etc., in I4, which is conventionally formed using polycrystalline silicon using a photoengraving technique. Note that it is clear that there is no need to increase the area of the semiconductor device.

That is, after forming the JIII polycrystalline silicon using the t-crystalline engraving technique or the like, an oxide film is formed to form the second polycrystalline silicon between the first polycrystalline silicon and the second polycrystalline silicon. No electrical continuity occurs, and this rounding makes it possible to create approximately twice the resistance within the same area. For this [Ming #
Since there is an oxide film between the polycrystalline silicon and the second polycrystalline silicon (Fig. I1), no electrical conduction occurs.

Furthermore, even if we consider the case where impurities are diffused into the first polycrystalline silicon and the second polycrystalline silicon, the changes in the resistance of each layer caused by changes in impurity diffusion occur independently, but the The ratio of the resistance value of the combined resistance formed between the conductors 1 and 2 and the resistance value of the combined resistance formed between the lead-out conductors 2 and 3 is determined by Since the number of unit resistors in crystalline silicon is equal to each other, the ratio of resistance values remains constant even when the layer resistance changes.

Therefore, even if the amount of impurities diffused into the first and second polycrystalline silicon is different between the #Il polycrystalline silicon and the second polycrystalline silicon, the resistance value ratio of the combined resistance remains constant. It's obvious that it will go down.

In addition, the illustration of the embodiment of Jllll of this invention is shown as an example.If the number of unit resistors made by the first and second polycrystalline silicon forming each composite resistance is the same, the first and 111112 The number of polycrystalline silicon unit resistors may be any number.

FIG. 2 is an explanatory plan view of a second example of lI koji according to the present invention. #12m11th Composite ship compared to Figure 1.

It is suitable for increasing the resistance value ratio between antibodies.

FIG. 2 shows the combined resistance between the lead-out conductors 11 and 120 by connecting the first unit resistor 15 of polycrystalline silicon and the first unit resistor 16 of second polycrystalline silicon to the interconnecting conductor and contact 19. 1s1 polycrystalline silicon@2 unit resistor 17 and a second polycrystalline silicon eighth unit resistor 18 by contact 20 and interconnect conductor 14.
This is an example in which a combined resistance is constructed between the lead-out conductors 12 and 130.

The second embodiment of the present invention inherits the advantages of the first embodiment, and uses a resistor with a large resistance value ratio (1f)l!, although the accuracy of the resistance value ratio between the metal resistors is slightly lowered. It can be realized in a smaller area compared to the embodiment), and provides a very effective means for IIK, which requires a resistor with a large resistance value ratio.

As described above in detail with reference to the drawings, by using the embodiments of the present invention, a nine-coat conductor device with a high degree of integration and excellent specific accuracy can be realized, which is effective in expanding the field of application of the cow-conductor device.

[Brief explanation of the drawing]

FIGS. 1(a) and 1) show a plan view and a cross-sectional view of a first embodiment of the present invention, and FIG. 2 shows a plan view of a second embodiment of the present invention. 1.2.3.11.12.13°...Output conductor, 4.14...Interconnection conductor, 5...
・First polycrystalline silicon unit resistance, 6...Second polycrystalline silicon unit resistance, 7.19.20・°°...Contact, 8°9.21...Oxide film , 10...
...Silicon substrate, 15...Birth 1 first unit resistance of polycrystalline silicon, 16...Tail 2 first unit resistance of polycrystalline silicon, 17°... Second unit resistance of first polycrystalline silicon, 18°...°°°Second unit resistance of second polycrystalline silicon. 31: 1 'ff1

Claims (1)

[Claims] a first polycrystalline resistor group formed of first polycrystalline silicon on an insulating film formed on a silicon substrate; and a second polycrystalline resistor group formed via the first polycrystalline silicon and the insulating film. a second resistor group made of silicon;
The second resistor groups are respectively formed between the resistor groups, and interconnected by interconnecting conductors, and the first and second resistor groups have the same number of interconnections, and a composite resistor has at least A semiconductor device characterized in that it has two or more sets.