JPS58155747A - Ｉｃ基板の製法 - Google Patents

Ｉｃ基板の製法

Info

Publication number
JPS58155747A
JPS58155747A JP57038081A JP3808182A JPS58155747A JP S58155747 A JPS58155747 A JP S58155747A JP 57038081 A JP57038081 A JP 57038081A JP 3808182 A JP3808182 A JP 3808182A JP S58155747 A JPS58155747 A JP S58155747A
Authority
JP
Japan
Prior art keywords
substrate
electrodes
electrode
periphery
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57038081A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0219977B2 (enrdf_load_stackoverflow
Inventor
Masao Muramatsu
村松　正男
Toshio Haga
芳賀　敏夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyodo Printing Co Ltd
Original Assignee
Kyodo Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyodo Printing Co Ltd filed Critical Kyodo Printing Co Ltd
Priority to JP57038081A priority Critical patent/JPS58155747A/ja
Publication of JPS58155747A publication Critical patent/JPS58155747A/ja
Publication of JPH0219977B2 publication Critical patent/JPH0219977B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Credit Cards Or The Like (AREA)
  • Wire Bonding (AREA)
JP57038081A 1982-03-12 1982-03-12 Ｉｃ基板の製法 Granted JPS58155747A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57038081A JPS58155747A (ja) 1982-03-12 1982-03-12 Ｉｃ基板の製法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57038081A JPS58155747A (ja) 1982-03-12 1982-03-12 Ｉｃ基板の製法

Publications (2)

Publication Number Publication Date
JPS58155747A true JPS58155747A (ja) 1983-09-16
JPH0219977B2 JPH0219977B2 (enrdf_load_stackoverflow) 1990-05-07

Family

ID=12515526

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57038081A Granted JPS58155747A (ja) 1982-03-12 1982-03-12 Ｉｃ基板の製法

Country Status (1)

Country Link
JP (1) JPS58155747A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62185072U (enrdf_load_stackoverflow) * 1986-05-15 1987-11-25
JPH01108798A (ja) * 1987-10-21 1989-04-26 Nec Corp プリント配線板の製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5010564A (enrdf_load_stackoverflow) * 1973-05-25 1975-02-03

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5010564A (enrdf_load_stackoverflow) * 1973-05-25 1975-02-03

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62185072U (enrdf_load_stackoverflow) * 1986-05-15 1987-11-25
JPH01108798A (ja) * 1987-10-21 1989-04-26 Nec Corp プリント配線板の製造方法

Also Published As

Publication number Publication date
JPH0219977B2 (enrdf_load_stackoverflow) 1990-05-07

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