JPS58105618A - ラツチ装置 - Google Patents

ラツチ装置

Info

Publication number
JPS58105618A
JPS58105618A JP56204241A JP20424181A JPS58105618A JP S58105618 A JPS58105618 A JP S58105618A JP 56204241 A JP56204241 A JP 56204241A JP 20424181 A JP20424181 A JP 20424181A JP S58105618 A JPS58105618 A JP S58105618A
Authority
JP
Japan
Prior art keywords
latch
circuit
data
signal
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56204241A
Other languages
English (en)
Japanese (ja)
Other versions
JPH029365B2 (enExample
Inventor
Yukihiro Saeki
佐伯　幸弘
Yoshiharu Funabashi
船橋　義治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56204241A priority Critical patent/JPS58105618A/ja
Publication of JPS58105618A publication Critical patent/JPS58105618A/ja
Publication of JPH029365B2 publication Critical patent/JPH029365B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits

Landscapes

  • Static Random-Access Memory (AREA)
JP56204241A 1981-12-17 1981-12-17 ラツチ装置 Granted JPS58105618A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56204241A JPS58105618A (ja) 1981-12-17 1981-12-17 ラツチ装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56204241A JPS58105618A (ja) 1981-12-17 1981-12-17 ラツチ装置

Publications (2)

Publication Number Publication Date
JPS58105618A true JPS58105618A (ja) 1983-06-23
JPH029365B2 JPH029365B2 (enExample) 1990-03-01

Family

ID=16487180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56204241A Granted JPS58105618A (ja) 1981-12-17 1981-12-17 ラツチ装置

Country Status (1)

Country Link
JP (1) JPS58105618A (enExample)

Also Published As

Publication number Publication date
JPH029365B2 (enExample) 1990-03-01

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