JPS5778154A - Semiconductor device with multilayer channel - Google Patents

Semiconductor device with multilayer channel

Info

Publication number
JPS5778154A
JPS5778154A JP5557281A JP5557281A JPS5778154A JP S5778154 A JPS5778154 A JP S5778154A JP 5557281 A JP5557281 A JP 5557281A JP 5557281 A JP5557281 A JP 5557281A JP S5778154 A JPS5778154 A JP S5778154A
Authority
JP
Japan
Prior art keywords
layer
layers
wires
wire
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5557281A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6161700B2 (enrdf_load_stackoverflow
Inventor
Akira Masaki
Shinji Katono
Tsuneyo Chiba
Tetsuya Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5557281A priority Critical patent/JPS5778154A/ja
Publication of JPS5778154A publication Critical patent/JPS5778154A/ja
Publication of JPS6161700B2 publication Critical patent/JPS6161700B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP5557281A 1981-04-15 1981-04-15 Semiconductor device with multilayer channel Granted JPS5778154A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5557281A JPS5778154A (en) 1981-04-15 1981-04-15 Semiconductor device with multilayer channel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5557281A JPS5778154A (en) 1981-04-15 1981-04-15 Semiconductor device with multilayer channel

Publications (2)

Publication Number Publication Date
JPS5778154A true JPS5778154A (en) 1982-05-15
JPS6161700B2 JPS6161700B2 (enrdf_load_stackoverflow) 1986-12-26

Family

ID=13002428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5557281A Granted JPS5778154A (en) 1981-04-15 1981-04-15 Semiconductor device with multilayer channel

Country Status (1)

Country Link
JP (1) JPS5778154A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58444U (ja) * 1981-06-25 1983-01-05 富士通株式会社 半導体装置の多層配線構造
JPS5891657A (ja) * 1981-11-26 1983-05-31 Mitsubishi Electric Corp 半導体装置の多層配線構造
JPS5979549A (ja) * 1982-10-29 1984-05-08 Toshiba Corp 半導体集積回路
JPS63141A (ja) * 1986-06-19 1988-01-05 Fujitsu Ltd 半導体記憶装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58444U (ja) * 1981-06-25 1983-01-05 富士通株式会社 半導体装置の多層配線構造
JPS5891657A (ja) * 1981-11-26 1983-05-31 Mitsubishi Electric Corp 半導体装置の多層配線構造
JPS5979549A (ja) * 1982-10-29 1984-05-08 Toshiba Corp 半導体集積回路
JPS63141A (ja) * 1986-06-19 1988-01-05 Fujitsu Ltd 半導体記憶装置

Also Published As

Publication number Publication date
JPS6161700B2 (enrdf_load_stackoverflow) 1986-12-26

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