JPS6412552A - Wiring structure of semiconductor device - Google Patents

Abstract

PURPOSE:To restrain disconnection and decrease in cross-sectional area of an upper layer wiring so as to improve a semiconductor device in yield by a method wherein lower wirings are made narrower in space near the crossing section of plural wirings which are so provided in the same layer as to be parallel and adjacent to each other. CONSTITUTION:For instance, a first layer wiring 1 of three wires is formed as wires are parallel to each other and a second layer wiring 4 is provided over the wiring 1 through the intermediary of an interlaminar insulating film 3 so as to cross the wiring 1 at a right angle. And, three wires of the first wiring 1 protrude laterally in a broadwise direction near a crossing point where the wiring 1 intersects the second layer wiring 4 at right angles, so that spaces between adjacent wires are made to be narrower locally near the crossing point. By these processes, constriction of the upper wiring caused by the difference in level of the lower wiring is smaller, wherefore the disconnection trouble can be prevented. On the other hand, the narrower a space becomes, the risk of a short circuit increases, but as a space between wires is made only locally to be narrower, so that decrease in yield due to a short circuit is made to be smaller.