JPS5776872A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5776872A JPS5776872A JP55152065A JP15206580A JPS5776872A JP S5776872 A JPS5776872 A JP S5776872A JP 55152065 A JP55152065 A JP 55152065A JP 15206580 A JP15206580 A JP 15206580A JP S5776872 A JPS5776872 A JP S5776872A
- Authority
- JP
- Japan
- Prior art keywords
- type
- layer
- iil
- impurity
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
Abstract
PURPOSE:To obtain a high performance and a high dielectric strength of an IIL by a method wherein a base of an inverse type n-p-n transistor which composes the IIL is formed by a diffusion region of an impurity which is diffused from a buried layer with a high impurity density to a surface of an epitaxial layer. CONSTITUTION:An n<+> type buried layer 3 is formed on a p<-> type Si substrate 1 by diffusing high density Sb with on oxide film 2 as a mask. Then p<+> type buried layers 5, 6 are formed by diffusing high density B with an oxide film 4 as a mask. And an n<-> type epitaxial layer 7 is formed. Then p type layers 8, 9 are formed by the diffusion of the impurity B from the p<+> type buried layer 5, 6 by annealing process. As the impurity density near the surface of the p type layers 8, 9 is low, the p type layer 8 becomes a base of an inverse type n-p-n transistor which composes an IIL and the junction of the p type layer 8 and an n<+> type collector region formed afterwards becomes n<+>-p<-> junction, so that the dielectric strength of the IIL is improved.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55152065A JPS5776872A (en) | 1980-10-31 | 1980-10-31 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55152065A JPS5776872A (en) | 1980-10-31 | 1980-10-31 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5776872A true JPS5776872A (en) | 1982-05-14 |
Family
ID=15532285
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55152065A Pending JPS5776872A (en) | 1980-10-31 | 1980-10-31 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5776872A (en) |
-
1980
- 1980-10-31 JP JP55152065A patent/JPS5776872A/en active Pending
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