JPS5769758A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5769758A
JPS5769758A JP14549380A JP14549380A JPS5769758A JP S5769758 A JPS5769758 A JP S5769758A JP 14549380 A JP14549380 A JP 14549380A JP 14549380 A JP14549380 A JP 14549380A JP S5769758 A JPS5769758 A JP S5769758A
Authority
JP
Japan
Prior art keywords
substrate
layer
region
regions
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14549380A
Other languages
Japanese (ja)
Other versions
JPS6333300B2 (en
Inventor
Shuhei Iwade
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14549380A priority Critical patent/JPS5769758A/en
Publication of JPS5769758A publication Critical patent/JPS5769758A/en
Publication of JPS6333300B2 publication Critical patent/JPS6333300B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Abstract

PURPOSE:To increase the density of semiconductor device in a semiconductor integrated circuit device in which each element region is isolated by dieletric material, narrowing the conductive region reaching a substrate through an epitaxial layer for supplying potential to the semiconductor substrate, thereby preventing the shortcircuit of the element regions. CONSTITUTION:A groove reaching the substrate 1 by etching or the like is formed on an epitaxial layer 3 on a substrate 1, impurity diffused regions 4a, 4b are formed dielectric regions 13a, 13b and dielctric layer 14 are formed, and further collector 6, emitter 7 and base 8, electrodes 9, 10, 11, 15, 17 are formed. When a potential lower than the epitaxial layer 3 is applied to the electrode 15, an inversion layer 16 is formed at the layer 3 at the periphery of the dielectric region, the conductive path through the inversion layer 17 and the diffused region 4b is formed from the electrode 17, and the potential is supplied to the substrate 1.
JP14549380A 1980-10-16 1980-10-16 Semiconductor device Granted JPS5769758A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14549380A JPS5769758A (en) 1980-10-16 1980-10-16 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14549380A JPS5769758A (en) 1980-10-16 1980-10-16 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5769758A true JPS5769758A (en) 1982-04-28
JPS6333300B2 JPS6333300B2 (en) 1988-07-05

Family

ID=15386529

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14549380A Granted JPS5769758A (en) 1980-10-16 1980-10-16 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5769758A (en)

Also Published As

Publication number Publication date
JPS6333300B2 (en) 1988-07-05

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