JPS5764977A - Manufactue of p-n junction gate type field effect transistor - Google Patents

Manufactue of p-n junction gate type field effect transistor

Info

Publication number
JPS5764977A
JPS5764977A JP14134280A JP14134280A JPS5764977A JP S5764977 A JPS5764977 A JP S5764977A JP 14134280 A JP14134280 A JP 14134280A JP 14134280 A JP14134280 A JP 14134280A JP S5764977 A JPS5764977 A JP S5764977A
Authority
JP
Japan
Prior art keywords
layer
gaas
type
junction
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14134280A
Other languages
Japanese (ja)
Other versions
JPH023541B2 (en
Inventor
Ryuichiro Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14134280A priority Critical patent/JPS5764977A/en
Publication of JPS5764977A publication Critical patent/JPS5764977A/en
Publication of JPH023541B2 publication Critical patent/JPH023541B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To obtain a P-N junction FET which has a short gate length by suppressing a lateral impurity dispersion to the same degree as a dispersion along a depth direction on formation of a P-N junction type gate. CONSTITUTION:After applying a resist mask 6 on an SiO2 5 which covers a GaAs wafer cut into mesa an opening is formed on it, and a Zn-doped P type polycrystalline GaAs 21 is laminated next to an N type GaAs active layer 3. A resist mask 22 is applied, layer 21 and an SiO2 film 5 is selectively etched away successively, and the mask is removed. Next by a gate junction formed by diffusion of an active layer 3-Zn from a polycrystalline layer 21 through heat-treatment applied after covering with a resist mask 23 except a gate region and the SiO2 film 5 on the N type layer 3 is removed by etching again dispersion of Zn toward a lateral direction is suppressed to a degree toward depth direction. Next an AuGe/Ni electrode 24 is attached utilizing the layer 21 as a mask, by heat-treatment after removal by etching of the SiO2 film 5 on a high resistance GaAs 2 and a polycrystalline GaAs 21 positioned on the former an ohmic electrode 25 is obtained, and a P-N junction gate type FET of a short gate length is completed.
JP14134280A 1980-10-09 1980-10-09 Manufactue of p-n junction gate type field effect transistor Granted JPS5764977A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14134280A JPS5764977A (en) 1980-10-09 1980-10-09 Manufactue of p-n junction gate type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14134280A JPS5764977A (en) 1980-10-09 1980-10-09 Manufactue of p-n junction gate type field effect transistor

Publications (2)

Publication Number Publication Date
JPS5764977A true JPS5764977A (en) 1982-04-20
JPH023541B2 JPH023541B2 (en) 1990-01-24

Family

ID=15289724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14134280A Granted JPS5764977A (en) 1980-10-09 1980-10-09 Manufactue of p-n junction gate type field effect transistor

Country Status (1)

Country Link
JP (1) JPS5764977A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6173377A (en) * 1984-09-18 1986-04-15 Sony Corp Manufacture of fet

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6173377A (en) * 1984-09-18 1986-04-15 Sony Corp Manufacture of fet

Also Published As

Publication number Publication date
JPH023541B2 (en) 1990-01-24

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