JPS5745262A - Sealing and fitting structure of semiconductor device - Google Patents
Sealing and fitting structure of semiconductor deviceInfo
- Publication number
- JPS5745262A JPS5745262A JP11984380A JP11984380A JPS5745262A JP S5745262 A JPS5745262 A JP S5745262A JP 11984380 A JP11984380 A JP 11984380A JP 11984380 A JP11984380 A JP 11984380A JP S5745262 A JPS5745262 A JP S5745262A
- Authority
- JP
- Japan
- Prior art keywords
- cap
- sealing
- ceramic
- melting point
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
PURPOSE:To prevent a short circuit between electrodes due to a solder bump by forming an insulating oxide film on an exterior surface of a cap consisting of a metallic material sealed and fitted to a chip carrier with glass with the low melting point. CONSTITUTION:With the chip carrier 1 consisting of the laminates of a ceramic board material, a concave section 2 is shaped at the central section, and a semiconductor element 3 is joined. An electrode of the semiconductor element 3 is connected to electrode patterns through gold wires 4. The concave section 2 is covered with the cap 5 in a Kovar or iron-nickel alloy having an approximately same thermal expansion coefficient as ceramic, and hermetically sealed with the frit group low melting point sealing and fitting glass 6 having the approximarely same thermal expansion coefficient as ceramic. An aluminum clad layer 9 composed of an aluminum thin-film is shaped onto a lower surface of the cap 5, oxidized in a heat treatment process such as sealing and fitting, and changed into the insulating oxide film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11984380A JPS5745262A (en) | 1980-09-01 | 1980-09-01 | Sealing and fitting structure of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11984380A JPS5745262A (en) | 1980-09-01 | 1980-09-01 | Sealing and fitting structure of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5745262A true JPS5745262A (en) | 1982-03-15 |
JPS634350B2 JPS634350B2 (en) | 1988-01-28 |
Family
ID=14771630
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11984380A Granted JPS5745262A (en) | 1980-09-01 | 1980-09-01 | Sealing and fitting structure of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5745262A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0098176A2 (en) * | 1982-06-30 | 1984-01-11 | Fujitsu Limited | The packaging of semiconductor chips |
JPS6027433U (en) * | 1983-07-29 | 1985-02-25 | 松下電工株式会社 | Electronic component mounting structure |
US6630727B1 (en) * | 1998-03-03 | 2003-10-07 | Infineon Technologies Ag | Modularly expandable multi-layered semiconductor component |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53130974U (en) * | 1977-03-23 | 1978-10-17 | ||
JPS5559746A (en) * | 1978-10-27 | 1980-05-06 | Hitachi Ltd | Semiconductor device and its mounting circuit device |
-
1980
- 1980-09-01 JP JP11984380A patent/JPS5745262A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53130974U (en) * | 1977-03-23 | 1978-10-17 | ||
JPS5559746A (en) * | 1978-10-27 | 1980-05-06 | Hitachi Ltd | Semiconductor device and its mounting circuit device |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0098176A2 (en) * | 1982-06-30 | 1984-01-11 | Fujitsu Limited | The packaging of semiconductor chips |
EP0098176A3 (en) * | 1982-06-30 | 1985-09-25 | Fujitsu Limited | The packaging of semiconductor chips |
JPS6027433U (en) * | 1983-07-29 | 1985-02-25 | 松下電工株式会社 | Electronic component mounting structure |
US6630727B1 (en) * | 1998-03-03 | 2003-10-07 | Infineon Technologies Ag | Modularly expandable multi-layered semiconductor component |
Also Published As
Publication number | Publication date |
---|---|
JPS634350B2 (en) | 1988-01-28 |
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