JPS5368573A - Hermetic sealing method of semiconductor device - Google Patents
Hermetic sealing method of semiconductor deviceInfo
- Publication number
- JPS5368573A JPS5368573A JP14430976A JP14430976A JPS5368573A JP S5368573 A JPS5368573 A JP S5368573A JP 14430976 A JP14430976 A JP 14430976A JP 14430976 A JP14430976 A JP 14430976A JP S5368573 A JPS5368573 A JP S5368573A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- chip
- sealing method
- hermetic sealing
- lead conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE: To save high temperature treatment processes at least once by bonding a semiconductor chip to a lead conductor which is integrated in the form of a lead frame, connecting each electrode of the chip to each lead conductor by fine metal wires, thereafter sealing the chip in a ceramic base and a ceramic cap by using low melting point bonding glass.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14430976A JPS5368573A (en) | 1976-11-30 | 1976-11-30 | Hermetic sealing method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14430976A JPS5368573A (en) | 1976-11-30 | 1976-11-30 | Hermetic sealing method of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5368573A true JPS5368573A (en) | 1978-06-19 |
Family
ID=15359077
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14430976A Pending JPS5368573A (en) | 1976-11-30 | 1976-11-30 | Hermetic sealing method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5368573A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5599747A (en) * | 1979-01-26 | 1980-07-30 | Hitachi Ltd | Package for semiconductor device |
EP0500750A1 (en) * | 1989-11-15 | 1992-09-02 | Olin Corp | A method for housing a tape-bonded electronic device and the package employed. |
-
1976
- 1976-11-30 JP JP14430976A patent/JPS5368573A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5599747A (en) * | 1979-01-26 | 1980-07-30 | Hitachi Ltd | Package for semiconductor device |
EP0500750A1 (en) * | 1989-11-15 | 1992-09-02 | Olin Corp | A method for housing a tape-bonded electronic device and the package employed. |
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