JPS5239378A - Silicon-gated mos type semiconductor device - Google Patents

Silicon-gated mos type semiconductor device

Info

Publication number
JPS5239378A
JPS5239378A JP50115203A JP11520375A JPS5239378A JP S5239378 A JPS5239378 A JP S5239378A JP 50115203 A JP50115203 A JP 50115203A JP 11520375 A JP11520375 A JP 11520375A JP S5239378 A JPS5239378 A JP S5239378A
Authority
JP
Japan
Prior art keywords
silicon
semiconductor device
type semiconductor
mos type
gated mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50115203A
Other languages
Japanese (ja)
Inventor
Taku Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP50115203A priority Critical patent/JPS5239378A/en
Publication of JPS5239378A publication Critical patent/JPS5239378A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05073Single internal layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4845Details of ball bonds
    • H01L2224/48451Shape
    • H01L2224/48453Shape of the interface with the bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

Abstract

PURPOSE: To increase the relaibility of connection between lead wire and pad after bonding by leaving polycrystalline Si on the portion of bonding pad.
COPYRIGHT: (C)1977,JPO&Japio
JP50115203A 1975-09-23 1975-09-23 Silicon-gated mos type semiconductor device Pending JPS5239378A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50115203A JPS5239378A (en) 1975-09-23 1975-09-23 Silicon-gated mos type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50115203A JPS5239378A (en) 1975-09-23 1975-09-23 Silicon-gated mos type semiconductor device

Publications (1)

Publication Number Publication Date
JPS5239378A true JPS5239378A (en) 1977-03-26

Family

ID=14656898

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50115203A Pending JPS5239378A (en) 1975-09-23 1975-09-23 Silicon-gated mos type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5239378A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447476A (en) * 1977-09-21 1979-04-14 Hitachi Ltd Semiconductor device
JPS56105644A (en) * 1980-01-25 1981-08-22 Mitsubishi Electric Corp Semiconductor ic device
JPS56105670A (en) * 1980-01-28 1981-08-22 Mitsubishi Electric Corp Semiconductor device
JPS57159035A (en) * 1981-03-26 1982-10-01 Yamagata Nippon Denki Kk Manufacture of semiconductor device
JPS57166039A (en) * 1981-04-06 1982-10-13 Toshiba Corp Semiconductor device and its manufacture
JPS5821349A (en) * 1981-07-28 1983-02-08 Toshiba Corp Semiconductor device
JPS5823451A (en) * 1981-08-05 1983-02-12 Toshiba Corp Semiconductor device
JPS5886733A (en) * 1981-11-18 1983-05-24 Nec Corp Semiconductor device
JPS58197736A (en) * 1982-05-13 1983-11-17 Nec Corp Semiconductor device
JPS614265A (en) * 1984-06-19 1986-01-10 Rohm Co Ltd Semiconductor integrated circuit device
JPS6381938A (en) * 1986-09-26 1988-04-12 Toshiba Corp Semiconductor device
US4884121A (en) * 1986-05-22 1989-11-28 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
US5468998A (en) * 1980-09-01 1995-11-21 Hitachi, Ltd. Resin molded type semiconductor device having a conductor film
US5539243A (en) * 1993-08-03 1996-07-23 Nec Corporation Semiconductor device having spaces and having reduced parasitic capacitance

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447476A (en) * 1977-09-21 1979-04-14 Hitachi Ltd Semiconductor device
JPS56105644A (en) * 1980-01-25 1981-08-22 Mitsubishi Electric Corp Semiconductor ic device
JPS56105670A (en) * 1980-01-28 1981-08-22 Mitsubishi Electric Corp Semiconductor device
US5468998A (en) * 1980-09-01 1995-11-21 Hitachi, Ltd. Resin molded type semiconductor device having a conductor film
JPS6227734B2 (en) * 1981-03-26 1987-06-16 Yamagata Nippon Denki Kk
JPS57159035A (en) * 1981-03-26 1982-10-01 Yamagata Nippon Denki Kk Manufacture of semiconductor device
JPS57166039A (en) * 1981-04-06 1982-10-13 Toshiba Corp Semiconductor device and its manufacture
JPS5821349A (en) * 1981-07-28 1983-02-08 Toshiba Corp Semiconductor device
JPH0130298B2 (en) * 1981-07-28 1989-06-19 Tokyo Shibaura Electric Co
JPS5823451A (en) * 1981-08-05 1983-02-12 Toshiba Corp Semiconductor device
JPS6364898B2 (en) * 1981-11-18 1988-12-14
JPS5886733A (en) * 1981-11-18 1983-05-24 Nec Corp Semiconductor device
JPH0126533B2 (en) * 1982-05-13 1989-05-24 Nippon Electric Co
JPS58197736A (en) * 1982-05-13 1983-11-17 Nec Corp Semiconductor device
JPS614265A (en) * 1984-06-19 1986-01-10 Rohm Co Ltd Semiconductor integrated circuit device
JPH0345898B2 (en) * 1984-06-19 1991-07-12 Rohm Kk
US4884121A (en) * 1986-05-22 1989-11-28 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
JPS6381938A (en) * 1986-09-26 1988-04-12 Toshiba Corp Semiconductor device
US5539243A (en) * 1993-08-03 1996-07-23 Nec Corporation Semiconductor device having spaces and having reduced parasitic capacitance

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