JPS5737878A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS5737878A
JPS5737878A JP11371280A JP11371280A JPS5737878A JP S5737878 A JPS5737878 A JP S5737878A JP 11371280 A JP11371280 A JP 11371280A JP 11371280 A JP11371280 A JP 11371280A JP S5737878 A JPS5737878 A JP S5737878A
Authority
JP
Japan
Prior art keywords
substrate
complimentary
floating gate
type
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11371280A
Other languages
Japanese (ja)
Other versions
JPS6318866B2 (en
Inventor
Hiroshi Momose
Norio Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11371280A priority Critical patent/JPS5737878A/en
Publication of JPS5737878A publication Critical patent/JPS5737878A/en
Publication of JPS6318866B2 publication Critical patent/JPS6318866B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0925—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising an N-well only in the substrate

Abstract

PURPOSE:To prevent latching up of a complimentary FET by ensuring coexistence of complimentary and floating gate type MOSFETs on a p-layer over a p<+>-type Si substrate. CONSTITUTION:A p-layer 12 of about 10OMEGAcm in the specific resistance is laid on a p<+>-type substrate 11 of about 0.01-0.1OMEGAcm and a complimentary MOS circuit 3 and a floating gate type MOSFET14 are provided thereon. With such an arrangement, an n<+> drain layer 16 of a floating gate MOS14 as the source of generating the substrate current and the p<+> substrate 11 are so low in the resistance that most of the substrate current flows to the substrate 11. This prevents latching up of a complimentary MOS inverter 3.
JP11371280A 1980-08-19 1980-08-19 Semiconductor integrated circuit Granted JPS5737878A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11371280A JPS5737878A (en) 1980-08-19 1980-08-19 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11371280A JPS5737878A (en) 1980-08-19 1980-08-19 Semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS5737878A true JPS5737878A (en) 1982-03-02
JPS6318866B2 JPS6318866B2 (en) 1988-04-20

Family

ID=14619238

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11371280A Granted JPS5737878A (en) 1980-08-19 1980-08-19 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5737878A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4856072A (en) * 1971-11-15 1973-08-07
JPS51102477A (en) * 1976-02-02 1976-09-09 Tdk Electronics Co Ltd HANDOTAI MEMORIS OCHI
JPS53100780A (en) * 1977-02-15 1978-09-02 Sanyo Electric Co Ltd Complementary type mos transistor
JPS56114375A (en) * 1980-02-15 1981-09-08 Nec Corp Manufacture of nonvolatile semiconductor memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4856072A (en) * 1971-11-15 1973-08-07
JPS51102477A (en) * 1976-02-02 1976-09-09 Tdk Electronics Co Ltd HANDOTAI MEMORIS OCHI
JPS53100780A (en) * 1977-02-15 1978-09-02 Sanyo Electric Co Ltd Complementary type mos transistor
JPS56114375A (en) * 1980-02-15 1981-09-08 Nec Corp Manufacture of nonvolatile semiconductor memory

Also Published As

Publication number Publication date
JPS6318866B2 (en) 1988-04-20

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