JPS5733471A - Memory access control system for multiprocessor - Google Patents
Memory access control system for multiprocessorInfo
- Publication number
- JPS5733471A JPS5733471A JP10550380A JP10550380A JPS5733471A JP S5733471 A JPS5733471 A JP S5733471A JP 10550380 A JP10550380 A JP 10550380A JP 10550380 A JP10550380 A JP 10550380A JP S5733471 A JPS5733471 A JP S5733471A
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- another
- memory access
- access
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10550380A JPS5733471A (en) | 1980-07-31 | 1980-07-31 | Memory access control system for multiprocessor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10550380A JPS5733471A (en) | 1980-07-31 | 1980-07-31 | Memory access control system for multiprocessor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5733471A true JPS5733471A (en) | 1982-02-23 |
JPS6153747B2 JPS6153747B2 (ja) | 1986-11-19 |
Family
ID=14409396
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10550380A Granted JPS5733471A (en) | 1980-07-31 | 1980-07-31 | Memory access control system for multiprocessor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5733471A (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59200366A (ja) * | 1983-04-26 | 1984-11-13 | Nec Corp | ロツク制御方式 |
JPH03502870A (ja) * | 1988-12-19 | 1991-06-27 | ヒユーズ・エアクラフト・カンパニー | プログラム可能な高速分割器 |
JPH04227552A (ja) * | 1990-04-05 | 1992-08-17 | Internatl Business Mach Corp <Ibm> | ストアスルーキャッシュ管理システム |
JPH04230550A (ja) * | 1990-10-12 | 1992-08-19 | Internatl Business Mach Corp <Ibm> | 情報処理ネツトワーク及び情報処理方法 |
US6748509B2 (en) | 1987-12-14 | 2004-06-08 | Intel Corporation | Memory component with configurable multiple transfer formats |
-
1980
- 1980-07-31 JP JP10550380A patent/JPS5733471A/ja active Granted
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59200366A (ja) * | 1983-04-26 | 1984-11-13 | Nec Corp | ロツク制御方式 |
US6748509B2 (en) | 1987-12-14 | 2004-06-08 | Intel Corporation | Memory component with configurable multiple transfer formats |
US7136971B2 (en) | 1987-12-14 | 2006-11-14 | Intel Corporation | Memory controller for synchronous burst transfers |
JPH03502870A (ja) * | 1988-12-19 | 1991-06-27 | ヒユーズ・エアクラフト・カンパニー | プログラム可能な高速分割器 |
JPH04227552A (ja) * | 1990-04-05 | 1992-08-17 | Internatl Business Mach Corp <Ibm> | ストアスルーキャッシュ管理システム |
JPH04230550A (ja) * | 1990-10-12 | 1992-08-19 | Internatl Business Mach Corp <Ibm> | 情報処理ネツトワーク及び情報処理方法 |
Also Published As
Publication number | Publication date |
---|---|
JPS6153747B2 (ja) | 1986-11-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5657155A (en) | Data processing system | |
EP0254960A3 (en) | A multiprocessor system | |
JPS56123051A (en) | Data transfer system in master slave system | |
JPS5733471A (en) | Memory access control system for multiprocessor | |
JPS6481066A (en) | Connection system for multi-processor | |
JPS564857A (en) | Access system for memory unit | |
JPS56147224A (en) | Information processor | |
JPS5466727A (en) | Access control system for buffer memory | |
JPS5642868A (en) | Access method for common memory in multiprocessor system | |
JPS559228A (en) | Memory request control system | |
JPS55113182A (en) | Virtual computer system with tlb | |
JPS543437A (en) | Cash memory control system | |
JPS5335447A (en) | Multi processor system | |
JPS52120728A (en) | Sharing data control system of poly processor system | |
JPS54142021A (en) | Data process system | |
JPS5724081A (en) | Virtual storage controller of multiprocessor | |
JPS5717067A (en) | Conflict control system of common memory | |
JPS54105930A (en) | Main memory control unit | |
JPS5786181A (en) | Second buffer storage device | |
JPS5644953A (en) | Parallel processor system | |
JPS5537680A (en) | Decentralized control system | |
JPS56111955A (en) | Shared memory control method of multicpu system | |
JPS54148330A (en) | Buffer memory control system | |
ES8502558A1 (es) | Sistema de proceso de control de acceso en un sistema de ordenador. | |
JPS5587363A (en) | Buffer memory control system |