ES8502558A1 - Sistema de proceso de control de acceso en un sistema de ordenador. - Google Patents

Sistema de proceso de control de acceso en un sistema de ordenador.

Info

Publication number
ES8502558A1
ES8502558A1 ES523747A ES523747A ES8502558A1 ES 8502558 A1 ES8502558 A1 ES 8502558A1 ES 523747 A ES523747 A ES 523747A ES 523747 A ES523747 A ES 523747A ES 8502558 A1 ES8502558 A1 ES 8502558A1
Authority
ES
Spain
Prior art keywords
access
access control
control processing
storage
computer system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES523747A
Other languages
English (en)
Other versions
ES523747A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP57112862A external-priority patent/JPS593774A/ja
Priority claimed from JP57154950A external-priority patent/JPS5945570A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of ES523747A0 publication Critical patent/ES523747A0/es
Publication of ES8502558A1 publication Critical patent/ES8502558A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

SISTEMA DE PROCESO DE CONTROL DE ACCESO EN UN SISTEMA DE ORDENADOR.CONSISTE EN UN SISTEMA DE MEMORIA EN EL QUE SE HA PREVISTO UNA MEMORIA INTERMEDIA BS Y UNA MEMORIA PRINCIPAL MS; DONDE SE REALIZA EL ACCESO EN PRIMER LUGAR A LA MEMORIA BS BASANDOSE EN EL REQUERIMIENTO DE ACCESO Y CUANDO NO SE ENCUENTRA LA INFORMACION DESEADA EN LA MEMORIA BS, SE REALIZA EL ACCESO A LA MEMORIA MS. CUANDO NO EXISTE INFORMACION REQUERIDA, A LA CUAL SE ACCEDE A PARTIR DE LA UNIDAD DE REQUERIMIENTO DE ACCESO Y SE HA HECHO A CONTINUACION EL ACCESO A LA MS, EL ACCESO A LA BS SE EFECTUA BASANDOSE EN EL SIGUIENTE REQUERIMIENTO DE ACCESO PROCEDENTE DE LA MISMA UNIDAD DE REQUERIMIENTO DE ACCESO EN PARALELO CON EL ACCESO A LA MEMORIA MS.
ES523747A 1982-06-30 1983-06-30 Sistema de proceso de control de acceso en un sistema de ordenador. Expired ES8502558A1 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP57112862A JPS593774A (ja) 1982-06-30 1982-06-30 アクセス処理方式
JP57154950A JPS5945570A (ja) 1982-09-06 1982-09-06 アクセス処理方式

Publications (2)

Publication Number Publication Date
ES523747A0 ES523747A0 (es) 1985-01-01
ES8502558A1 true ES8502558A1 (es) 1985-01-01

Family

ID=26451932

Family Applications (1)

Application Number Title Priority Date Filing Date
ES523747A Expired ES8502558A1 (es) 1982-06-30 1983-06-30 Sistema de proceso de control de acceso en un sistema de ordenador.

Country Status (7)

Country Link
EP (1) EP0098170B1 (es)
KR (1) KR870000117B1 (es)
AU (1) AU545700B2 (es)
BR (1) BR8303525A (es)
CA (1) CA1199122A (es)
DE (1) DE3380458D1 (es)
ES (1) ES8502558A1 (es)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1541240A (fr) * 1966-11-10 Ibm Accès à chevauchement et à intercalation pour mémoires à plusieurs vitesses
US3705388A (en) * 1969-08-12 1972-12-05 Kogyo Gijutsuin Memory control system which enables access requests during block transfer
DE2048119C3 (de) * 1970-09-30 1978-09-07 Siemens Ag, 1000 Berlin U. 8000 Muenchen Anordnung und Verfahren zur Steuerung der Datenübertragung zwischen externen Geräten und einer Datenverarbeitungsanlage
US3964054A (en) * 1975-06-23 1976-06-15 International Business Machines Corporation Hierarchy response priority adjustment mechanism
US4345309A (en) * 1980-01-28 1982-08-17 Digital Equipment Corporation Relating to cached multiprocessor system with pipeline timing

Also Published As

Publication number Publication date
ES523747A0 (es) 1985-01-01
EP0098170A2 (en) 1984-01-11
BR8303525A (pt) 1984-02-07
AU1640783A (en) 1984-01-05
AU545700B2 (en) 1985-07-25
DE3380458D1 (en) 1989-09-28
EP0098170B1 (en) 1989-08-23
KR870000117B1 (ko) 1987-02-11
EP0098170A3 (en) 1985-08-07
CA1199122A (en) 1986-01-07
KR840005232A (ko) 1984-11-05

Similar Documents

Publication Publication Date Title
DE3169774D1 (en) Method and device to control the conflicts posed by multiple accesses to a same cache-memory of a digital data processing system comprising at least two processors each possessing a cache
ES8403641A1 (es) Perfeccionamientos en un sistema para controlar una unidad de almacenamiento de claves en un aparato de proceso de datos.
AU578772B2 (en) Data processor system and method
EP0111840A3 (en) Access control method for multiprocessor systems
ES8303745A1 (es) Un dispositivo de unidad de datos para conexion a un equipo de interconexion de sistema en una instalacion de tratamien-miento de datos.
SE8405456D0 (sv) Mycket snabbt minnes- och minnesforvaltningssystem
EP0391517A3 (en) Method and apparatus for ordering and queueing multiple memory access requests
GB1193719A (en) Data Processing Apparatus
ES8205073A1 (es) Perfeccionamientos en dispositivos de asignacion de fuentes de recursos
EP0389242A3 (en) Data base processing system using multiprocessor system
EP0254960A3 (en) A multiprocessor system
ES8602272A1 (es) Una instalacion de tratamiento de datos que incluye una pluralidad de dispositivos multiprocesadores.
EP0194024A3 (en) Apparatus and method for controlling access in a multi-cache data processing system
ES8502558A1 (es) Sistema de proceso de control de acceso en un sistema de ordenador.
DE3471187D1 (en) Computer with automatic switching of peripheral units, and peripheral unit suited for such a switching
AU505596B2 (en) Method and means for storing and accessing information ina shared access multiprogrammed data processing system
JPS5733471A (en) Memory access control system for multiprocessor
WO1993009497A3 (en) Memory unit including a multiple write cache
JPS5786181A (en) Second buffer storage device
ES8501545A1 (es) Una unidad de control de requrimiento de acceso en un sistema de procesado de datos.
JPS6476342A (en) Information processing system
JPS6478361A (en) Data processing system
ES2002300A6 (es) Un sistema de tratamiento de datos, particularmente para ordenadores de escala ultra grande destinados a realizar calculos cientificos
JPS5553720A (en) Data transfer control system
JPS54134529A (en) Information processing system

Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19971001