JPS5727326A - Control device for data transfer - Google Patents

Control device for data transfer

Info

Publication number
JPS5727326A
JPS5727326A JP10329480A JP10329480A JPS5727326A JP S5727326 A JPS5727326 A JP S5727326A JP 10329480 A JP10329480 A JP 10329480A JP 10329480 A JP10329480 A JP 10329480A JP S5727326 A JPS5727326 A JP S5727326A
Authority
JP
Japan
Prior art keywords
data transfer
register
block
transfer
contents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10329480A
Other languages
Japanese (ja)
Other versions
JPS6243224B2 (en
Inventor
Yuji Ogawa
Norio Onodera
Toshiyuki Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10329480A priority Critical patent/JPS5727326A/en
Publication of JPS5727326A publication Critical patent/JPS5727326A/en
Publication of JPS6243224B2 publication Critical patent/JPS6243224B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Abstract

PURPOSE:To make the omission of the retransfer of normal transfer end blocks possible at the up date processing by so controlling the data transfer that a retry start point is renewed every time when the transfer for one block ends normally. CONSTITUTION:A register 4 storing control parameters for data transfer of plural blocks, and a register 5 for holding the parameters at the start time which saves the contents of the register 4 prior to starting of the data transfer for one block are provided to a control device which fetches and holds the parameters for controlling data transfer based on the command of a host device and controls the transfer through lower devices. Also, a renewing part 6 for the contents of the register 5 based on the normal execution of the data transfer for one block and a set circuit part 8 which sets the contents of the register 5 in the register 4 by the instruction of the part 7 at the non-normal end of the data transfer for one block are provided, and at the time when an up date reguest occurs, the retry is carried out from the top position of the data transfer for one block by the instruction of the part 7.
JP10329480A 1980-07-28 1980-07-28 Control device for data transfer Granted JPS5727326A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10329480A JPS5727326A (en) 1980-07-28 1980-07-28 Control device for data transfer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10329480A JPS5727326A (en) 1980-07-28 1980-07-28 Control device for data transfer

Publications (2)

Publication Number Publication Date
JPS5727326A true JPS5727326A (en) 1982-02-13
JPS6243224B2 JPS6243224B2 (en) 1987-09-11

Family

ID=14350252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10329480A Granted JPS5727326A (en) 1980-07-28 1980-07-28 Control device for data transfer

Country Status (1)

Country Link
JP (1) JPS5727326A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62133548A (en) * 1985-12-05 1987-06-16 Fujitsu Ltd Retry control system in input/output control device
JPS62218664A (en) * 1986-03-18 1987-09-26 Honda Motor Co Ltd Swash plate type hydraulic device
JPH0195336A (en) * 1987-10-07 1989-04-13 Nec Corp System for controlling retry

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597623A (en) * 1979-01-18 1980-07-25 Mitsubishi Electric Corp Control method for input/output device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597623A (en) * 1979-01-18 1980-07-25 Mitsubishi Electric Corp Control method for input/output device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62133548A (en) * 1985-12-05 1987-06-16 Fujitsu Ltd Retry control system in input/output control device
JPS62218664A (en) * 1986-03-18 1987-09-26 Honda Motor Co Ltd Swash plate type hydraulic device
JPH0319392B2 (en) * 1986-03-18 1991-03-14 Honda Motor Co Ltd
JPH0195336A (en) * 1987-10-07 1989-04-13 Nec Corp System for controlling retry

Also Published As

Publication number Publication date
JPS6243224B2 (en) 1987-09-11

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