JPS6243224B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a channel control device, particularly a channel control device such as a block multiplexer channel that controls data transfer over a plurality of blocks. The present invention relates to a channel control device that controls updating of a retry start point and omits retransmission of blocks that have already been successfully transferred during retry processing.

Conventionally, as shown in FIG. 1, for a host device having a data processing device 1 and a main storage device 2,
A block multiplexer channel 3-0 is connected to the disk 5-0 via an input/output control device 4, such as a disk pack controller.
A large amount of data transfer over a plurality of blocks (one block is, for example, 512 bytes) is controlled between the main storage device 2 and the main storage device 2. Further, similar data transfer is performed with other data processing devices 6 via the block multiplexer channel 3-1 as described above.

In such a case, channels 3-0 and 3-1 are
It receives "parameters for controlling data transfer" such as channel control words (CCW) from the host device, and performs transfer control based on them. However, in the conventional case, the above channel control word (CCW)
If it becomes necessary to retry due to an error, etc., the retry is performed from the beginning of the data transfer over the plurality of blocks. For this reason, even if an error occurs in the last block of data transfer over a plurality of blocks, data transfer is performed again from the first block, which is not always sufficient from the viewpoint of processing efficiency.

The present invention aims to solve the above problems, and focuses on the fact that channel control devices such as block multiplexer channels maintain parameters for data transfer, and significantly changes the existing configuration. The above points are resolved without having to do so. The channel control device of the present invention is a channel control device that fetches and holds parameters for controlling data transfer based on commands from a host data processing device, and controls data transfer via lower-level devices. a parameter holding register section that stores parameters for controlling data transfer over a block of data; a starting parameter holding register section for saving; a parameter updating section for updating the contents of the parameter holding register section based on the successful execution of data transfer for at least one block; and a parameter updating section for updating the contents of the parameter holding register section based on the data transfer for at least one block. The controller is equipped with a parameter set circuit section that restores the contents of the parameter holding register section at the start to the parameter holding register section based on instructions from the control section when the transfer of one block of data is completed abnormally. When a trial request occurs, a retry is performed from the beginning position of data transfer for one block using the restored contents of the parameter holding register based on instructions from the control section. It is said that This will be explained below with reference to the drawings.

FIG. 2 shows an embodiment of the channel control device of the present invention, which corresponds to block multiplexer channels 3-0 and 3-1 shown in FIG. Reference numeral 4 in the figure is a parameter holding register, in which the contents of the channel control word (CCW) instructed by the host device at the time of data transfer are set, and the contents are updated thereafter, and the contents at that point in time are set when retrying. A retry will be made based on this. Reference numeral 5 denotes a parameter holding register at the time of start, which saves the contents of the parameter holding register 4 before at least one block worth of data is transferred, in preparation for a retry. Reference numeral 6 denotes a parameter updating unit, which updates the contents of the parameter holding register 4 as described later when at least one block of data transfer is successfully completed.
Reference numeral 7 denotes a control unit that controls data transfer based on the contents of the parameter holding register 4, and outputs the illustrated "transfer start instruction" signal, "update instruction" signal,
It issues a "retry start instruction" signal, a "1 block transfer successful completion" signal, etc. Reference numeral 8 denotes a parameter setting circuit section according to the present invention, which is constituted by an AND circuit, and sets the contents of the parameter holding register 5 at the time of start to the parameter holding register 4 when the "retry start instruction" signal is issued. do. 9 represents an AND circuit, and 10 represents an OR circuit.

The channel control word (CCW) mentioned above is generally
(i) Command address, (ii) Command code, (iii)
It includes a data byte address, (iv) flag, (v) data byte count, etc., and is first set in the parameter holding register 4 in response to a command from the host device.

When data transfer over a plurality of blocks is started, the control section 7 issues a "transfer start instruction" signal. As a result, the AND circuit 9 is turned on via the OR circuit 10, and the contents of the register 4 at that point in time are saved in the register 5. In this state, the first one block of data is transferred based on the contents of the register 4, and when the transfer is completed normally, the control section 7 issues a "one block transfer normally completed" signal. As a result, based on the contents of the register 4, the parameter update unit 6 increments the data byte address to "+512" and the data byte count to "-512" and writes them into the register 4. That is, the contents of register 4 are updated to correspond to the transfer of the next block. On the other hand, the control unit 7 issues an "update instruction" signal when the above update is performed. As a result, the contents of register 4 are saved in register 5 via AND circuit 9. As a result, the contents of the register 5 updated to correspond to the transfer of the next block are saved.

Thereafter, block transfers are performed one after another in the same manner, but if an error occurs during transfer of a certain block, for example, the i-th block, the lower device notifies the control unit 7 of a command retry request. In response, the control unit 7 issues a "retry start instruction" signal without issuing the above-mentioned "update instruction" signal. Therefore, the contents of the register 5 at that point in time are set in the register 4 via the illustrated parameter set circuit section 8. The contents at this point in time are the contents immediately before the start of transfer of the i-th block, and the control unit 7 receives the contents from the register 4 and retries from the i-th block.

As described above, according to the present invention, when retrying when transferring a large amount of data, it is possible to omit retrying for blocks that have already been successfully transferred. For this reason, the following problem with the conventional case is that an error occurs while the first retry is successful and the transfer is performed sequentially, and the transfer is restarted from the beginning at the second retry. There will be no need to redo any problems.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram explaining the prerequisite problem of the present invention,
FIG. 2 shows an embodiment of the channel control device of the present invention. In the figure, 1 is a data processing device, 2 is a main storage device,
3 is a channel control device according to the present invention, 4 is a parameter holding register, 5 is a starting parameter holding register, 6 is a parameter updating section, 7 is a control section, 8
represents the parameter set circuit section.

Claims (1)

[Claims] 1 In a channel control device that fetches and holds parameters for controlling data transfer based on commands from a host data processing device and controls data transfer via lower devices, the data is a parameter holding register section that stores parameters for controlling the transfer; and a starting parameter holding register section that saves the contents of the parameter holding register section each time at least one block of data transfer is started prior to the data transfer. , a parameter update unit that updates the contents of the parameter holding register based on the fact that at least one block of data has been transferred normally; and a control unit that updates the contents of the parameter holding register based on the fact that at least one block of data has been transferred abnormally. The controller is equipped with a parameter set circuit section that restores the contents of the parameter holding register section at the start to the parameter holding register section based on instructions from the control section, and when a retry request is generated regarding the data transfer of one block, the control section 1. A channel control device characterized in that, based on an instruction from a controller, data transfer of one block is retried from the beginning position using the restored contents of the parameter holding register.