JPS5720452A - Forming method for multilayer wiring - Google Patents

Forming method for multilayer wiring

Info

Publication number
JPS5720452A
JPS5720452A JP9539580A JP9539580A JPS5720452A JP S5720452 A JPS5720452 A JP S5720452A JP 9539580 A JP9539580 A JP 9539580A JP 9539580 A JP9539580 A JP 9539580A JP S5720452 A JPS5720452 A JP S5720452A
Authority
JP
Japan
Prior art keywords
layer
ito
film
coated
ito7
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9539580A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6262055B2 (enrdf_load_stackoverflow
Inventor
Kiyohiro Kawasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP9539580A priority Critical patent/JPS5720452A/ja
Publication of JPS5720452A publication Critical patent/JPS5720452A/ja
Publication of JPS6262055B2 publication Critical patent/JPS6262055B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
JP9539580A 1980-07-11 1980-07-11 Forming method for multilayer wiring Granted JPS5720452A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9539580A JPS5720452A (en) 1980-07-11 1980-07-11 Forming method for multilayer wiring

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9539580A JPS5720452A (en) 1980-07-11 1980-07-11 Forming method for multilayer wiring

Publications (2)

Publication Number Publication Date
JPS5720452A true JPS5720452A (en) 1982-02-02
JPS6262055B2 JPS6262055B2 (enrdf_load_stackoverflow) 1987-12-24

Family

ID=14136456

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9539580A Granted JPS5720452A (en) 1980-07-11 1980-07-11 Forming method for multilayer wiring

Country Status (1)

Country Link
JP (1) JPS5720452A (enrdf_load_stackoverflow)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5013156A (enrdf_load_stackoverflow) * 1973-06-06 1975-02-12
JPS5258491A (en) * 1975-11-10 1977-05-13 Hitachi Ltd Semiconductor device
JPS5365088A (en) * 1976-11-22 1978-06-10 Nec Corp Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5013156A (enrdf_load_stackoverflow) * 1973-06-06 1975-02-12
JPS5258491A (en) * 1975-11-10 1977-05-13 Hitachi Ltd Semiconductor device
JPS5365088A (en) * 1976-11-22 1978-06-10 Nec Corp Semiconductor device

Also Published As

Publication number Publication date
JPS6262055B2 (enrdf_load_stackoverflow) 1987-12-24

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