JPS57197837A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57197837A
JPS57197837A JP8230981A JP8230981A JPS57197837A JP S57197837 A JPS57197837 A JP S57197837A JP 8230981 A JP8230981 A JP 8230981A JP 8230981 A JP8230981 A JP 8230981A JP S57197837 A JPS57197837 A JP S57197837A
Authority
JP
Japan
Prior art keywords
electrode
wiring
lift
etching
resist pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8230981A
Other languages
Japanese (ja)
Inventor
Nobuaki Hotta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8230981A priority Critical patent/JPS57197837A/en
Publication of JPS57197837A publication Critical patent/JPS57197837A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To form a buried electrode in an electrode opening with an etching mask as lift-off material for flatness of a wiring surface, by applying anisotropy etching to the insulating layer on a semiconductor substrate to form an electrode opening without side etch. CONSTITUTION:A phosphorus glass layer 17 is formed on an Si substrate 11 with a gate oxide film 12, field oxide film 13, Si gate electrode 14 and Si wiring 15 for heat treatment to soften with the stepwise difference smoothly. Next, after anisotropic etching is applied with a resist pattern 18 as a mask to form an electrode opening 19 without side etch, metallic thin layers 20, 21 are adhered to remove the othesr than the buried electrode 21 with the resist pattern 18 as a lift-off material. Then, the stepwise difference on the wiring surface of the wiring metallic film 22 is reduced for the elimination of the disconnection thereof.
JP8230981A 1981-05-29 1981-05-29 Manufacture of semiconductor device Pending JPS57197837A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8230981A JPS57197837A (en) 1981-05-29 1981-05-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8230981A JPS57197837A (en) 1981-05-29 1981-05-29 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57197837A true JPS57197837A (en) 1982-12-04

Family

ID=13770950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8230981A Pending JPS57197837A (en) 1981-05-29 1981-05-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57197837A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008193910A (en) * 2007-02-08 2008-08-28 Kubota Corp Structure for leaking down of treated product in thresher

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008193910A (en) * 2007-02-08 2008-08-28 Kubota Corp Structure for leaking down of treated product in thresher

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