JPS57166716A - Lamination delay line - Google Patents
Lamination delay lineInfo
- Publication number
- JPS57166716A JPS57166716A JP5165781A JP5165781A JPS57166716A JP S57166716 A JPS57166716 A JP S57166716A JP 5165781 A JP5165781 A JP 5165781A JP 5165781 A JP5165781 A JP 5165781A JP S57166716 A JPS57166716 A JP S57166716A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- electrodes
- out parts
- elements
- terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/30—Time-delay networks
- H03H7/32—Time-delay networks with lumped inductance and capacitance
Abstract
PURPOSE:To form a small-sized, thin delay line by mounting chip type inductance elements on a composite capacitor substrate obtained by laminating electrodes and dielectric layers mutually, and connecting the external electrodes of the elements to formed electrodes on the external surface of the substrate. CONSTITUTION:On a dielectric layer 1, an electrode 2 is formed while its lead- out parts 3 and 4 are exposed to the upper and lower sides of the layer 1. Then, a dielectric layer 5 is printed, four small electrodes 6-9 are printed being superposed upon the lower electrode, and lead-out parts (a)-(d) are provided alternately at the upper and lower parts. A dielectric layer 10 is formed covering the electrodes 6-9 with the lead-out parts (a)-(d) exposed. They are baked at prescribed temperature to form a composite capacitor substrate. On the substrate, linear conductors 11-14 connected to the lead-out parts (a)-(d), linear conductors 15 and 16 extending from terminals A and B on a left and a right flank, and terminals C and D connecting with the lead-out parts 3 and 4 are provided. Lastly, known chip type inductance elements L1-L5 are mounted, and the conductors 11-16 and the external terminals 22 and 23 of the elements are soldered.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5165781A JPS57166716A (en) | 1981-04-08 | 1981-04-08 | Lamination delay line |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5165781A JPS57166716A (en) | 1981-04-08 | 1981-04-08 | Lamination delay line |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57166716A true JPS57166716A (en) | 1982-10-14 |
Family
ID=12892942
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5165781A Pending JPS57166716A (en) | 1981-04-08 | 1981-04-08 | Lamination delay line |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57166716A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5974723U (en) * | 1982-11-10 | 1984-05-21 | ティーディーケイ株式会社 | LC composite parts |
JPH0436327U (en) * | 1990-07-25 | 1992-03-26 |
-
1981
- 1981-04-08 JP JP5165781A patent/JPS57166716A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5974723U (en) * | 1982-11-10 | 1984-05-21 | ティーディーケイ株式会社 | LC composite parts |
JPH0115159Y2 (en) * | 1982-11-10 | 1989-05-08 | ||
JPH0436327U (en) * | 1990-07-25 | 1992-03-26 |
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