JPS57154856A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57154856A
JPS57154856A JP56040111A JP4011181A JPS57154856A JP S57154856 A JPS57154856 A JP S57154856A JP 56040111 A JP56040111 A JP 56040111A JP 4011181 A JP4011181 A JP 4011181A JP S57154856 A JPS57154856 A JP S57154856A
Authority
JP
Japan
Prior art keywords
film
semiconductor device
subsequently
dielectric
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56040111A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0363219B2 (enrdf_load_stackoverflow
Inventor
Kenji Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56040111A priority Critical patent/JPS57154856A/ja
Publication of JPS57154856A publication Critical patent/JPS57154856A/ja
Publication of JPH0363219B2 publication Critical patent/JPH0363219B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281—Lateral isolation by selective oxidation of silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
JP56040111A 1981-03-19 1981-03-19 Semiconductor device Granted JPS57154856A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56040111A JPS57154856A (en) 1981-03-19 1981-03-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56040111A JPS57154856A (en) 1981-03-19 1981-03-19 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS57154856A true JPS57154856A (en) 1982-09-24
JPH0363219B2 JPH0363219B2 (enrdf_load_stackoverflow) 1991-09-30

Family

ID=12571736

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56040111A Granted JPS57154856A (en) 1981-03-19 1981-03-19 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57154856A (enrdf_load_stackoverflow)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072243A (ja) * 1983-09-28 1985-04-24 Matsushita Electric Ind Co Ltd 半導体集積回路装置
JPS6074452A (ja) * 1983-09-29 1985-04-26 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS60127740A (ja) * 1983-12-15 1985-07-08 Matsushita Electric Ind Co Ltd 半導体集積回路装置
JPS62274740A (ja) * 1986-05-23 1987-11-28 Nec Corp 半導体装置
JPH0642510B2 (ja) * 1983-06-13 1994-06-01 エヌ・シー・アール・インターナショナル・インコーポレイテッド 半導体構造の形成方法
US6110798A (en) * 1996-01-05 2000-08-29 Micron Technology, Inc. Method of fabricating an isolation structure on a semiconductor substrate

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5612749A (en) * 1979-07-12 1981-02-07 Matsushita Electric Ind Co Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5612749A (en) * 1979-07-12 1981-02-07 Matsushita Electric Ind Co Ltd Production of semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0642510B2 (ja) * 1983-06-13 1994-06-01 エヌ・シー・アール・インターナショナル・インコーポレイテッド 半導体構造の形成方法
JPS6072243A (ja) * 1983-09-28 1985-04-24 Matsushita Electric Ind Co Ltd 半導体集積回路装置
JPS6074452A (ja) * 1983-09-29 1985-04-26 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS60127740A (ja) * 1983-12-15 1985-07-08 Matsushita Electric Ind Co Ltd 半導体集積回路装置
JPS62274740A (ja) * 1986-05-23 1987-11-28 Nec Corp 半導体装置
US6110798A (en) * 1996-01-05 2000-08-29 Micron Technology, Inc. Method of fabricating an isolation structure on a semiconductor substrate
US6479370B2 (en) 1996-01-05 2002-11-12 Micron Technology, Inc. Isolated structure and method of fabricating such a structure on a substrate
US6559032B2 (en) 1996-01-05 2003-05-06 Micron Technology, Inc. Method of fabricating an isolation structure on a semiconductor substrate

Also Published As

Publication number Publication date
JPH0363219B2 (enrdf_load_stackoverflow) 1991-09-30

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