JPS5612749A - Production of semiconductor device - Google Patents
Production of semiconductor deviceInfo
- Publication number
- JPS5612749A JPS5612749A JP8887179A JP8887179A JPS5612749A JP S5612749 A JPS5612749 A JP S5612749A JP 8887179 A JP8887179 A JP 8887179A JP 8887179 A JP8887179 A JP 8887179A JP S5612749 A JPS5612749 A JP S5612749A
- Authority
- JP
- Japan
- Prior art keywords
- oxidation resistant
- film
- si3n4
- resistant film
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76281—Lateral isolation by selective oxidation of silicon
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To provide a plurality of island regions with insulated separation between the bottom and the side by the oxide film by oxidizing the substrate with the first oxidation resistant provided on the surface thereof having several openings etched and the second oxidation resistant film on the opening side. CONSTITUTION:The Si substrate 21 is etched with the first oxidation resistant film 22 mask made of Si3N4 or the like provided thereon to form several openings. Then, with the second oxidation resistant film mask 24 made of Si3N4 provided on the side of the opening, oxidization is performed to form an Si island region surrounded by the bottom and the side on the SiO2 film 27. A bipolar transistor, a FET and the like are provided in this island region. This enables easy formation of small element regions separately insulated from each other thereby attaining a high density of integration.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8887179A JPS6028387B2 (en) | 1979-07-12 | 1979-07-12 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8887179A JPS6028387B2 (en) | 1979-07-12 | 1979-07-12 | Manufacturing method of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5612749A true JPS5612749A (en) | 1981-02-07 |
JPS6028387B2 JPS6028387B2 (en) | 1985-07-04 |
Family
ID=13955065
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8887179A Expired JPS6028387B2 (en) | 1979-07-12 | 1979-07-12 | Manufacturing method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6028387B2 (en) |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57154855A (en) * | 1981-03-19 | 1982-09-24 | Toshiba Corp | Manufacture of semiconductor device |
JPS57154856A (en) * | 1981-03-19 | 1982-09-24 | Toshiba Corp | Semiconductor device |
JPS58197742A (en) * | 1982-05-13 | 1983-11-17 | Seiko Epson Corp | Isolation by dielectric |
JPS58182177U (en) * | 1982-05-31 | 1983-12-05 | リズム時計工業株式会社 | Time adjustment mechanism of time signal clock |
JPS598346A (en) * | 1982-06-30 | 1984-01-17 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Integrated circuit completely isolated with dielectric and method of forming same |
JPS6072243A (en) * | 1983-09-28 | 1985-04-24 | Matsushita Electric Ind Co Ltd | Semiconductor ic device |
JPS6074452A (en) * | 1983-09-29 | 1985-04-26 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
JPS6085671U (en) * | 1983-11-02 | 1985-06-13 | 株式会社荏原製作所 | check valve |
JPS60127740A (en) * | 1983-12-15 | 1985-07-08 | Matsushita Electric Ind Co Ltd | Semiconductor integrated circuit device |
US4563227A (en) * | 1981-12-08 | 1986-01-07 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing a semiconductor device |
JPS61125039A (en) * | 1984-11-21 | 1986-06-12 | Nec Corp | Semiconductor device and manufacture thereof |
US4685198A (en) * | 1985-07-25 | 1987-08-11 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing isolated semiconductor devices |
JPH0642510B2 (en) * | 1983-06-13 | 1994-06-01 | エヌ・シー・アール・インターナショナル・インコーポレイテッド | Method of forming a semiconductor structure |
EP1067599A1 (en) * | 1999-07-09 | 2001-01-10 | STMicroelectronics S.r.l. | A method of forming structures with buried oxide regions in a semiconductor substrate |
DE19654301B4 (en) * | 1995-12-30 | 2005-03-03 | Hyundai Electronics Industries Co., Ltd., Ichon | Process for producing a substrate with silicon on an insulator |
JP2013048161A (en) * | 2011-08-29 | 2013-03-07 | Citizen Holdings Co Ltd | Semiconductor device manufacturing method |
-
1979
- 1979-07-12 JP JP8887179A patent/JPS6028387B2/en not_active Expired
Cited By (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57154856A (en) * | 1981-03-19 | 1982-09-24 | Toshiba Corp | Semiconductor device |
JPH0363219B2 (en) * | 1981-03-19 | 1991-09-30 | Tokyo Shibaura Electric Co | |
JPS57154855A (en) * | 1981-03-19 | 1982-09-24 | Toshiba Corp | Manufacture of semiconductor device |
US4563227A (en) * | 1981-12-08 | 1986-01-07 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing a semiconductor device |
JPS58197742A (en) * | 1982-05-13 | 1983-11-17 | Seiko Epson Corp | Isolation by dielectric |
JPS58182177U (en) * | 1982-05-31 | 1983-12-05 | リズム時計工業株式会社 | Time adjustment mechanism of time signal clock |
JPS598346A (en) * | 1982-06-30 | 1984-01-17 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Integrated circuit completely isolated with dielectric and method of forming same |
JPS6347337B2 (en) * | 1982-06-30 | 1988-09-21 | Intaanashonaru Bijinesu Mashiinzu Corp | |
JPH0642510B2 (en) * | 1983-06-13 | 1994-06-01 | エヌ・シー・アール・インターナショナル・インコーポレイテッド | Method of forming a semiconductor structure |
JPS6072243A (en) * | 1983-09-28 | 1985-04-24 | Matsushita Electric Ind Co Ltd | Semiconductor ic device |
US4814287A (en) * | 1983-09-28 | 1989-03-21 | Matsushita Electric Industrial Co. Ltd. | Method of manufacturing a semiconductor integrated circuit device |
JPS6074452A (en) * | 1983-09-29 | 1985-04-26 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
JPS6085671U (en) * | 1983-11-02 | 1985-06-13 | 株式会社荏原製作所 | check valve |
JPS60127740A (en) * | 1983-12-15 | 1985-07-08 | Matsushita Electric Ind Co Ltd | Semiconductor integrated circuit device |
JPS61125039A (en) * | 1984-11-21 | 1986-06-12 | Nec Corp | Semiconductor device and manufacture thereof |
JPH0478178B2 (en) * | 1984-11-21 | 1992-12-10 | Nippon Electric Co | |
US4685198A (en) * | 1985-07-25 | 1987-08-11 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing isolated semiconductor devices |
DE19654301B4 (en) * | 1995-12-30 | 2005-03-03 | Hyundai Electronics Industries Co., Ltd., Ichon | Process for producing a substrate with silicon on an insulator |
EP1067599A1 (en) * | 1999-07-09 | 2001-01-10 | STMicroelectronics S.r.l. | A method of forming structures with buried oxide regions in a semiconductor substrate |
US6455391B1 (en) | 1999-07-09 | 2002-09-24 | Stmicroelectronics S.R.L. | Method of forming structures with buried regions in a semiconductor device |
JP2013048161A (en) * | 2011-08-29 | 2013-03-07 | Citizen Holdings Co Ltd | Semiconductor device manufacturing method |
Also Published As
Publication number | Publication date |
---|---|
JPS6028387B2 (en) | 1985-07-04 |
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