JPS53135263A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS53135263A
JPS53135263A JP5036477A JP5036477A JPS53135263A JP S53135263 A JPS53135263 A JP S53135263A JP 5036477 A JP5036477 A JP 5036477A JP 5036477 A JP5036477 A JP 5036477A JP S53135263 A JPS53135263 A JP S53135263A
Authority
JP
Japan
Prior art keywords
production
semiconductor device
japio
sio
spin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5036477A
Inventor
Masahiko Nakamae
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP5036477A priority Critical patent/JPS53135263A/en
Publication of JPS53135263A publication Critical patent/JPS53135263A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To diffuse impurity by the spin-on method with giving gradient to the edge part of SiO2 for a mask by utilizing the etching speed difference between a thermal oxide film and a Si compound.
COPYRIGHT: (C)1978,JPO&Japio
JP5036477A 1977-04-28 1977-04-28 Production of semiconductor device Pending JPS53135263A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5036477A JPS53135263A (en) 1977-04-28 1977-04-28 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5036477A JPS53135263A (en) 1977-04-28 1977-04-28 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS53135263A true JPS53135263A (en) 1978-11-25

Family

ID=12856827

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5036477A Pending JPS53135263A (en) 1977-04-28 1977-04-28 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS53135263A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583226A (en) * 1981-06-30 1983-01-10 Fujitsu Ltd Manufacture of semiconductor device
JPS58131730A (en) * 1982-01-28 1983-08-05 Owens Illinois Inc Doped oxide film and method of producing composite article
JPS58147113A (en) * 1982-02-11 1983-09-01 Owens Illinois Inc Doped oxidized film and method of producing doped semiconductor
US5308790A (en) * 1992-10-16 1994-05-03 Ncr Corporation Selective sidewall diffusion process using doped SOG
US5312512A (en) * 1992-10-23 1994-05-17 Ncr Corporation Global planarization using SOG and CMP
US5322805A (en) * 1992-10-16 1994-06-21 Ncr Corporation Method for forming a bipolar emitter using doped SOG
US5340752A (en) * 1992-10-23 1994-08-23 Ncr Corporation Method for forming a bipolar transistor using doped SOG
US5340770A (en) * 1992-10-23 1994-08-23 Ncr Corporation Method of making a shallow junction by using first and second SOG layers
US5455185A (en) * 1991-02-08 1995-10-03 Siemens Aktiengesellschaft Method for manufacturing a bipolar transistor having base and collector in a vertical sequence
US5953608A (en) * 1996-07-04 1999-09-14 Nec Corporation Method of forming a DRAM stacked capacitor using an etch blocking film of silicon oxide

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583226A (en) * 1981-06-30 1983-01-10 Fujitsu Ltd Manufacture of semiconductor device
JPS58131730A (en) * 1982-01-28 1983-08-05 Owens Illinois Inc Doped oxide film and method of producing composite article
JPS58147113A (en) * 1982-02-11 1983-09-01 Owens Illinois Inc Doped oxidized film and method of producing doped semiconductor
US5455185A (en) * 1991-02-08 1995-10-03 Siemens Aktiengesellschaft Method for manufacturing a bipolar transistor having base and collector in a vertical sequence
US5308790A (en) * 1992-10-16 1994-05-03 Ncr Corporation Selective sidewall diffusion process using doped SOG
US5322805A (en) * 1992-10-16 1994-06-21 Ncr Corporation Method for forming a bipolar emitter using doped SOG
US5312512A (en) * 1992-10-23 1994-05-17 Ncr Corporation Global planarization using SOG and CMP
US5340752A (en) * 1992-10-23 1994-08-23 Ncr Corporation Method for forming a bipolar transistor using doped SOG
US5340770A (en) * 1992-10-23 1994-08-23 Ncr Corporation Method of making a shallow junction by using first and second SOG layers
US6010963A (en) * 1992-10-23 2000-01-04 Hyundai Electronics America Global planarization using SOG and CMP
US5953608A (en) * 1996-07-04 1999-09-14 Nec Corporation Method of forming a DRAM stacked capacitor using an etch blocking film of silicon oxide

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