JPS57149749A - Semiconductor device and its manufacture - Google Patents
Semiconductor device and its manufactureInfo
- Publication number
- JPS57149749A JPS57149749A JP56034622A JP3462281A JPS57149749A JP S57149749 A JPS57149749 A JP S57149749A JP 56034622 A JP56034622 A JP 56034622A JP 3462281 A JP3462281 A JP 3462281A JP S57149749 A JPS57149749 A JP S57149749A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- substrate
- single crystal
- porous
- insulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 5
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000010410 layer Substances 0.000 abstract 16
- 239000012212 insulator Substances 0.000 abstract 6
- 239000000758 substrate Substances 0.000 abstract 6
- 239000013078 crystal Substances 0.000 abstract 3
- 238000010438 heat treatment Methods 0.000 abstract 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 abstract 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 abstract 1
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 229960002050 hydrofluoric acid Drugs 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 230000001590 oxidative effect Effects 0.000 abstract 1
- 229910052697 platinum Inorganic materials 0.000 abstract 1
- 229910021426 porous silicon Inorganic materials 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
- 239000002344 surface layer Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/764—Air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76289—Lateral isolation by air gap
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56034622A JPS57149749A (en) | 1981-03-12 | 1981-03-12 | Semiconductor device and its manufacture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56034622A JPS57149749A (en) | 1981-03-12 | 1981-03-12 | Semiconductor device and its manufacture |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57149749A true JPS57149749A (en) | 1982-09-16 |
| JPS6155249B2 JPS6155249B2 (enrdf_load_stackoverflow) | 1986-11-27 |
Family
ID=12419480
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56034622A Granted JPS57149749A (en) | 1981-03-12 | 1981-03-12 | Semiconductor device and its manufacture |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57149749A (enrdf_load_stackoverflow) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4628591A (en) * | 1984-10-31 | 1986-12-16 | Texas Instruments Incorporated | Method for obtaining full oxide isolation of epitaxial islands in silicon utilizing selective oxidation of porous silicon |
| US4927781A (en) * | 1989-03-20 | 1990-05-22 | Miller Robert O | Method of making a silicon integrated circuit waveguide |
| US5057022A (en) * | 1989-03-20 | 1991-10-15 | Miller Robert O | Method of making a silicon integrated circuit waveguide |
| US5439843A (en) * | 1992-01-31 | 1995-08-08 | Canon Kabushiki Kaisha | Method for preparing a semiconductor substrate using porous silicon |
-
1981
- 1981-03-12 JP JP56034622A patent/JPS57149749A/ja active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4628591A (en) * | 1984-10-31 | 1986-12-16 | Texas Instruments Incorporated | Method for obtaining full oxide isolation of epitaxial islands in silicon utilizing selective oxidation of porous silicon |
| US4927781A (en) * | 1989-03-20 | 1990-05-22 | Miller Robert O | Method of making a silicon integrated circuit waveguide |
| US5057022A (en) * | 1989-03-20 | 1991-10-15 | Miller Robert O | Method of making a silicon integrated circuit waveguide |
| US5439843A (en) * | 1992-01-31 | 1995-08-08 | Canon Kabushiki Kaisha | Method for preparing a semiconductor substrate using porous silicon |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6155249B2 (enrdf_load_stackoverflow) | 1986-11-27 |
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