JPS54129881A - Manufacture for semiconductor device - Google Patents

Manufacture for semiconductor device

Info

Publication number
JPS54129881A
JPS54129881A JP3748778A JP3748778A JPS54129881A JP S54129881 A JPS54129881 A JP S54129881A JP 3748778 A JP3748778 A JP 3748778A JP 3748778 A JP3748778 A JP 3748778A JP S54129881 A JPS54129881 A JP S54129881A
Authority
JP
Japan
Prior art keywords
layer
type
film
mesa
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3748778A
Other languages
Japanese (ja)
Inventor
Hiroshi Morikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3748778A priority Critical patent/JPS54129881A/en
Publication of JPS54129881A publication Critical patent/JPS54129881A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE: To prevent the re-diffusion of impurity, by reducing the heat treatment time to obtain the SiO2 layer, through the diffusion of P type impurity at the mesa wall of the mesa type semiconductor element, converting the region including it into perforated Si layer with anodic reaction, and changing further it into the SiO2 layer.
CONSTITUTION: On the P+ type Si substrate 1, the P- type layer 2 is epitaxial grown, and N+ type layer 3 is diffused and the Si3N4 film 4 is placed on the specified region on it. Further, the P+ type layer 5 is formed by diffusion at the mesa wall produced with mesa etching by taking the film 4 as a mask, and the substrate 1 is taken as the anode to cause anodic reaction to convert the layer 5 into the layer 6 in hydrofluoric acid solution. In this case, since the reaction speed of P type is ten times faster than that of N type, the reaction can be in a short time of 1 to 2 minutes. After that, the liquid silicon compound solved into alcohol is coated on the layer 6, it is heat treated at about 500°C under O2 atmosphere, the layer 6 is changed into the SiO2 film 7, the film 4 is removed, and the electrode 8 is attached to here and the electrode 9 is to the rear side of the substrate 1.
COPYRIGHT: (C)1979,JPO&Japio
JP3748778A 1978-03-30 1978-03-30 Manufacture for semiconductor device Pending JPS54129881A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3748778A JPS54129881A (en) 1978-03-30 1978-03-30 Manufacture for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3748778A JPS54129881A (en) 1978-03-30 1978-03-30 Manufacture for semiconductor device

Publications (1)

Publication Number Publication Date
JPS54129881A true JPS54129881A (en) 1979-10-08

Family

ID=12498869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3748778A Pending JPS54129881A (en) 1978-03-30 1978-03-30 Manufacture for semiconductor device

Country Status (1)

Country Link
JP (1) JPS54129881A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009534819A (en) * 2006-04-19 2009-09-24 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング Microfabricated device with through-wafer connection and corresponding manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009534819A (en) * 2006-04-19 2009-09-24 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング Microfabricated device with through-wafer connection and corresponding manufacturing method

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