JPS57138133A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS57138133A JPS57138133A JP2385181A JP2385181A JPS57138133A JP S57138133 A JPS57138133 A JP S57138133A JP 2385181 A JP2385181 A JP 2385181A JP 2385181 A JP2385181 A JP 2385181A JP S57138133 A JPS57138133 A JP S57138133A
- Authority
- JP
- Japan
- Prior art keywords
- film
- poly
- shaped
- resist
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 4
- 238000000034 method Methods 0.000 abstract 3
- 150000004767 nitrides Chemical class 0.000 abstract 3
- 238000005468 ion implantation Methods 0.000 abstract 2
- 238000001020 plasma etching Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- RJCQBQGAPKAMLL-UHFFFAOYSA-N bromotrifluoromethane Chemical compound FC(F)(F)Br RJCQBQGAPKAMLL-UHFFFAOYSA-N 0.000 abstract 1
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 230000006837 decompression Effects 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 238000002513 implantation Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 230000003449 preventive effect Effects 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Landscapes
- Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
PURPOSE:To form an ion implantation layer with high accuracy, and to improve the yield of a minute curcuit by shaping the laminated films of two layers having different etching selectivity onto a substrate, forming a resist pattern and manufacturing a mask layer through reactive ion etching. CONSTITUTION:In the isolation region forming process of an IC such as an MOSIC, the nitride film 403 and the poly Si film 404 are laminated onto the P type Si substrate 401, to which a buffer oxide film is formed, through decompression CVD, and the resist pattern 405 is shaped. The poly Si 404 is etched through an RIE method by the mixed gas of CBrF3 and Cl2 while using the resist as a mask. The nitride film is etched by a CF4 group gas while employing the poly Si as a mask, the resist is removed, B ions are implanted, and inversion preventive layers 406 are formed. The poly Si is removed, a field film 407 is shaped through oxidation treatment, the nitride film is removed, and a process after forming a gate film 408 is conducted. Accordingly, the ion implantation region can be shaped with high accuracy because the implantation mask layer can be molded by the small difference of pattern conversion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2385181A JPS57138133A (en) | 1981-02-20 | 1981-02-20 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2385181A JPS57138133A (en) | 1981-02-20 | 1981-02-20 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57138133A true JPS57138133A (en) | 1982-08-26 |
Family
ID=12121917
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2385181A Pending JPS57138133A (en) | 1981-02-20 | 1981-02-20 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57138133A (en) |
-
1981
- 1981-02-20 JP JP2385181A patent/JPS57138133A/en active Pending
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