JPS57106079A - Mon-volatile semiconductor memory - Google Patents

Mon-volatile semiconductor memory

Info

Publication number
JPS57106079A
JPS57106079A JP18236280A JP18236280A JPS57106079A JP S57106079 A JPS57106079 A JP S57106079A JP 18236280 A JP18236280 A JP 18236280A JP 18236280 A JP18236280 A JP 18236280A JP S57106079 A JPS57106079 A JP S57106079A
Authority
JP
Japan
Prior art keywords
layer
region
insulating film
memory transistor
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18236280A
Other languages
Japanese (ja)
Inventor
Tetsuya Iizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP18236280A priority Critical patent/JPS57106079A/en
Publication of JPS57106079A publication Critical patent/JPS57106079A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation

Abstract

PURPOSE:To enable to erase by a memory cell unit, by a method wherein a channel region of a memory transistor is separated from a substrate by means of a channel region of a memory transistor by means of a region containing impurity the amount thereof is equal to that in a source and a drain region. CONSTITUTION:An insulating film 14 is placed between a control gate electrode 10 and a floating gate electrode 12. A very thin part of an insulating film 18 and a tunnel insulating film 19 are located between the electrode 12 and a p type channel layer 16. An N type embedded layer 20 is formed under and contacting the layer 16, while an N type source region 22 and a drain region contact the both ends of the layers 16 and 20. The under parts of the layers 20, 22 and 24 make contact with a p type semiconductor substrate 26. As indicated above, the layer 16 is separated from the substrate 26 by the layer 20 contacting the regions 22 and 24, which results in enabling to perform operations to erase by means of at least each memory transistor unit. This constitution enables the use of a self-matching techinque, which results in enabling the formation of a circuit in a high concetration.
JP18236280A 1980-12-23 1980-12-23 Mon-volatile semiconductor memory Pending JPS57106079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18236280A JPS57106079A (en) 1980-12-23 1980-12-23 Mon-volatile semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18236280A JPS57106079A (en) 1980-12-23 1980-12-23 Mon-volatile semiconductor memory

Publications (1)

Publication Number Publication Date
JPS57106079A true JPS57106079A (en) 1982-07-01

Family

ID=16116979

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18236280A Pending JPS57106079A (en) 1980-12-23 1980-12-23 Mon-volatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS57106079A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4979005A (en) * 1986-07-23 1990-12-18 Texas Instruments Incorporated Floating-gate memory cell with tailored doping profile
US5243210A (en) * 1987-02-21 1993-09-07 Kabushiki Kaisha Toshiba Semiconductor memory device and manufacturing method thereof
US5379253A (en) * 1992-06-01 1995-01-03 National Semiconductor Corporation High density EEPROM cell array with novel programming scheme and method of manufacture

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4979005A (en) * 1986-07-23 1990-12-18 Texas Instruments Incorporated Floating-gate memory cell with tailored doping profile
US5243210A (en) * 1987-02-21 1993-09-07 Kabushiki Kaisha Toshiba Semiconductor memory device and manufacturing method thereof
US5379253A (en) * 1992-06-01 1995-01-03 National Semiconductor Corporation High density EEPROM cell array with novel programming scheme and method of manufacture
US5402372A (en) * 1992-06-01 1995-03-28 National Semiconductor Corporation High density EEPROM cell array with improved access time and method of manufacture
US5453393A (en) * 1992-06-01 1995-09-26 National Semiconductor Corporation Method for forming a high density EEPROM cell array with improved access time

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