JPS57102073A - Semiconductor memory and manufacture thereof - Google Patents
Semiconductor memory and manufacture thereofInfo
- Publication number
- JPS57102073A JPS57102073A JP17824680A JP17824680A JPS57102073A JP S57102073 A JPS57102073 A JP S57102073A JP 17824680 A JP17824680 A JP 17824680A JP 17824680 A JP17824680 A JP 17824680A JP S57102073 A JPS57102073 A JP S57102073A
- Authority
- JP
- Japan
- Prior art keywords
- region
- film
- substrate
- conductive type
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 239000012535 impurity Substances 0.000 abstract 3
- 230000001590 oxidative effect Effects 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 2
- 239000006185 dispersion Substances 0.000 abstract 2
- 229910052710 silicon Inorganic materials 0.000 abstract 2
- 239000010703 silicon Substances 0.000 abstract 2
- 239000012141 concentrate Substances 0.000 abstract 1
- 230000005684 electric field Effects 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
Abstract
PURPOSE:To obtain a memory which can be written, by a method wherein a region, which is of the same conductive type as that of a substrate and has a high impurity concentration, is formed at a gate side of a drain region. CONSTITUTION:A floating gate 4 and a control gate 6, which are made of a polycrystalline silicon film, are formed through the medium of silicon oxidizing film 11 to fill a drain region C with an impurity being of the same conductive type as that of the substrate 1, and this forms region 12a extending under the oxidizing film 3. After the regist film 11 is removed, an impurity, being of an inverse conductive type to that of the substrate 1, is induced to regions B and C by a heat dispersion or an ion implantation to form regions 7 and 8. Then, the dispersion of the region 12a advance further to form a region 12b. Thus, when wrighting an electric field concentrates at the lower part of the silicon oxidizing film 3 of the region 12b, and thereby electrons can be stored in a gate without applying an excessive voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17824680A JPS57102073A (en) | 1980-12-16 | 1980-12-16 | Semiconductor memory and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17824680A JPS57102073A (en) | 1980-12-16 | 1980-12-16 | Semiconductor memory and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57102073A true JPS57102073A (en) | 1982-06-24 |
Family
ID=16045136
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17824680A Pending JPS57102073A (en) | 1980-12-16 | 1980-12-16 | Semiconductor memory and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57102073A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4861730A (en) * | 1988-01-25 | 1989-08-29 | Catalyst Semiconductor, Inc. | Process for making a high density split gate nonvolatile memory cell |
US5117269A (en) * | 1989-03-09 | 1992-05-26 | Sgs-Thomson Microelectronics S.R.L. | Eprom memory array with crosspoint configuration |
US5346842A (en) * | 1992-02-04 | 1994-09-13 | National Semiconductor Corporation | Method of making alternate metal/source virtual ground flash EPROM cell array |
US5482880A (en) * | 1991-08-30 | 1996-01-09 | Texas Instruments Incorporated | Non-volatile memory cell and fabrication method |
-
1980
- 1980-12-16 JP JP17824680A patent/JPS57102073A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4861730A (en) * | 1988-01-25 | 1989-08-29 | Catalyst Semiconductor, Inc. | Process for making a high density split gate nonvolatile memory cell |
US5117269A (en) * | 1989-03-09 | 1992-05-26 | Sgs-Thomson Microelectronics S.R.L. | Eprom memory array with crosspoint configuration |
US5482880A (en) * | 1991-08-30 | 1996-01-09 | Texas Instruments Incorporated | Non-volatile memory cell and fabrication method |
US5346842A (en) * | 1992-02-04 | 1994-09-13 | National Semiconductor Corporation | Method of making alternate metal/source virtual ground flash EPROM cell array |
US5464999A (en) * | 1992-02-04 | 1995-11-07 | National Semiconductor Corporation | Method for programming an alternate metal/source virtual ground flash EPROM cell array |
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