JPS57106056A - Electrode structural body of semiconductor device - Google Patents
Electrode structural body of semiconductor deviceInfo
- Publication number
- JPS57106056A JPS57106056A JP55183103A JP18310380A JPS57106056A JP S57106056 A JPS57106056 A JP S57106056A JP 55183103 A JP55183103 A JP 55183103A JP 18310380 A JP18310380 A JP 18310380A JP S57106056 A JPS57106056 A JP S57106056A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- solder
- ground
- electrode
- metal layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05551—Shape comprising apertures or cavities
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- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H01L2224/0555—Shape
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- H01L2224/05555—Shape in top view being circular or elliptic
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- H01L2224/0556—Disposition
- H01L2224/05569—Disposition the external layer being disposed on a redistribution layer on the semiconductor or solid-state body
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- H01L2224/05575—Plural external layers
- H01L2224/05578—Plural external layers being disposed next to each other, e.g. side-to-side arrangements
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- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
- H01L2224/13006—Bump connector larger than the underlying bonding area, e.g. than the under bump metallisation [UBM]
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- H01L2224/13076—Plural core members being mutually engaged together, e.g. through inserts
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55183103A JPS57106056A (en) | 1980-12-23 | 1980-12-23 | Electrode structural body of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55183103A JPS57106056A (en) | 1980-12-23 | 1980-12-23 | Electrode structural body of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57106056A true JPS57106056A (en) | 1982-07-01 |
| JPS6114666B2 JPS6114666B2 (enrdf_load_stackoverflow) | 1986-04-19 |
Family
ID=16129816
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55183103A Granted JPS57106056A (en) | 1980-12-23 | 1980-12-23 | Electrode structural body of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57106056A (enrdf_load_stackoverflow) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS607758A (ja) * | 1983-06-27 | 1985-01-16 | Nec Corp | 半導体装置 |
| US4642672A (en) * | 1982-09-14 | 1987-02-10 | Nec Corporation | Semiconductor device having registration mark for electron beam exposure |
| US5477086A (en) * | 1993-04-30 | 1995-12-19 | Lsi Logic Corporation | Shaped, self-aligning micro-bump structures |
| US5767580A (en) * | 1993-04-30 | 1998-06-16 | Lsi Logic Corporation | Systems having shaped, self-aligning micro-bump structures |
| WO2002001637A3 (en) * | 2000-06-28 | 2002-09-26 | Intel Corp | Layout and process for a device with segmented ball limited metallurgy for the inputs and outputs |
| US7180195B2 (en) | 2003-12-17 | 2007-02-20 | Intel Corporation | Method and apparatus for improved power routing |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6374481U (enrdf_load_stackoverflow) * | 1986-10-31 | 1988-05-18 |
-
1980
- 1980-12-23 JP JP55183103A patent/JPS57106056A/ja active Granted
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4642672A (en) * | 1982-09-14 | 1987-02-10 | Nec Corporation | Semiconductor device having registration mark for electron beam exposure |
| JPS607758A (ja) * | 1983-06-27 | 1985-01-16 | Nec Corp | 半導体装置 |
| US5477086A (en) * | 1993-04-30 | 1995-12-19 | Lsi Logic Corporation | Shaped, self-aligning micro-bump structures |
| US5558271A (en) * | 1993-04-30 | 1996-09-24 | Lsi Logic Corporation | Shaped, self-aligning micro-bump structures |
| US5767580A (en) * | 1993-04-30 | 1998-06-16 | Lsi Logic Corporation | Systems having shaped, self-aligning micro-bump structures |
| WO2002001637A3 (en) * | 2000-06-28 | 2002-09-26 | Intel Corp | Layout and process for a device with segmented ball limited metallurgy for the inputs and outputs |
| US7034402B1 (en) | 2000-06-28 | 2006-04-25 | Intel Corporation | Device with segmented ball limiting metallurgy |
| US7033923B2 (en) | 2000-06-28 | 2006-04-25 | Intel Corporation | Method of forming segmented ball limiting metallurgy |
| US7180195B2 (en) | 2003-12-17 | 2007-02-20 | Intel Corporation | Method and apparatus for improved power routing |
| US7208402B2 (en) | 2003-12-17 | 2007-04-24 | Intel Corporation | Method and apparatus for improved power routing |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6114666B2 (enrdf_load_stackoverflow) | 1986-04-19 |
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