JPS57152146A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57152146A
JPS57152146A JP56036057A JP3605781A JPS57152146A JP S57152146 A JPS57152146 A JP S57152146A JP 56036057 A JP56036057 A JP 56036057A JP 3605781 A JP3605781 A JP 3605781A JP S57152146 A JPS57152146 A JP S57152146A
Authority
JP
Japan
Prior art keywords
resist
opening part
bump
spacer
adhered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56036057A
Other languages
Japanese (ja)
Inventor
Makoto Koshikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Original Assignee
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Holdings Co Ltd, Citizen Watch Co Ltd filed Critical Citizen Holdings Co Ltd
Priority to JP56036057A priority Critical patent/JPS57152146A/en
Publication of JPS57152146A publication Critical patent/JPS57152146A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To improve quality of a semiconductor device by a method wherein size of an opening part in a spacer resist to be adhered on a bonding pad on a substrate is made as larger than the size of an opening part in a plated resist, and a part of the spacer resist is made to be buried at the circumference of the rising up part of a bump. CONSTITUTION:After Al wirings 2, the bonding pad 2a are formed on the substrate 1, a protective film 3 is adhered on the whole surface, and an opening part D1 is provided on the pad 2a. Moreover after the upper part of the protective film 3 is covered with the spacer resist layer 4 having the opening part D2 smaller than the D1, a barrier metal 5 is evaporated thereon. Then the plating resist layer 6 having the opening part D3 larger than the D1 is adhered thereon. After the bump 7 is formed, when the resist film 6, the barrier metal 5, and the spacer resist film 4 are stripped off by the lift off method, the spacer resist 4 is buried in between the bump and the protective film 3. Accordingly cushioning effect and sealing effect are exhibited, adhesion of the bump can be performed having high quality.
JP56036057A 1981-03-13 1981-03-13 Manufacture of semiconductor device Pending JPS57152146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56036057A JPS57152146A (en) 1981-03-13 1981-03-13 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56036057A JPS57152146A (en) 1981-03-13 1981-03-13 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57152146A true JPS57152146A (en) 1982-09-20

Family

ID=12459082

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56036057A Pending JPS57152146A (en) 1981-03-13 1981-03-13 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57152146A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0675532A2 (en) * 1994-03-31 1995-10-04 Du Pont Kabushiki Kaisha Method for forming solder bump in IC mounting board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0675532A2 (en) * 1994-03-31 1995-10-04 Du Pont Kabushiki Kaisha Method for forming solder bump in IC mounting board
EP0675532A3 (en) * 1994-03-31 1996-04-17 Pont Kabushiki Kaisha Du Method for forming solder bump in IC mounting board.

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