JPS57103552A - Data processor - Google Patents

Data processor

Info

Publication number
JPS57103552A
JPS57103552A JP18012080A JP18012080A JPS57103552A JP S57103552 A JPS57103552 A JP S57103552A JP 18012080 A JP18012080 A JP 18012080A JP 18012080 A JP18012080 A JP 18012080A JP S57103552 A JPS57103552 A JP S57103552A
Authority
JP
Japan
Prior art keywords
data
circuit
output
subtractor
alpha
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18012080A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6312302B2 (cs
Inventor
Noboru Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18012080A priority Critical patent/JPS57103552A/ja
Publication of JPS57103552A publication Critical patent/JPS57103552A/ja
Publication of JPS6312302B2 publication Critical patent/JPS6312302B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Executing Machine-Instructions (AREA)
JP18012080A 1980-12-19 1980-12-19 Data processor Granted JPS57103552A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18012080A JPS57103552A (en) 1980-12-19 1980-12-19 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18012080A JPS57103552A (en) 1980-12-19 1980-12-19 Data processor

Publications (2)

Publication Number Publication Date
JPS57103552A true JPS57103552A (en) 1982-06-28
JPS6312302B2 JPS6312302B2 (cs) 1988-03-18

Family

ID=16077761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18012080A Granted JPS57103552A (en) 1980-12-19 1980-12-19 Data processor

Country Status (1)

Country Link
JP (1) JPS57103552A (cs)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5345410A (en) * 1991-05-30 1994-09-06 Hitachi, Ltd. Arithmetic-logic unit with modulo addition/substraction function and microprocessor using the same

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6414303U (cs) * 1987-04-03 1989-01-25
JPS6431001U (cs) * 1987-08-19 1989-02-27
JPH01175603U (cs) * 1988-05-24 1989-12-14
JPH01300904A (ja) * 1988-05-24 1989-12-05 Seikichi Boku パーマネントウエーブのコールド・ウエーブ法
JPH01175602U (cs) * 1988-05-24 1989-12-14
JPH03292903A (ja) * 1990-04-11 1991-12-24 Planning Meito Hiroko:Kk コールドウェーブ方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5345410A (en) * 1991-05-30 1994-09-06 Hitachi, Ltd. Arithmetic-logic unit with modulo addition/substraction function and microprocessor using the same

Also Published As

Publication number Publication date
JPS6312302B2 (cs) 1988-03-18

Similar Documents

Publication Publication Date Title
JPS57103552A (en) Data processor
JPS54117646A (en) Computer
ES8201745A1 (es) Perfeccionamientos en procesadores digitales dispuestos paraun funcionamiento canalizado
JPS5324743A (en) Bus selector for electronic computer
JPS5720864A (en) Vector processor
JPS5474338A (en) Information processor
JPS5794849A (en) Microprogram controller
JPS5750050A (en) Microprogram control type electronic computer
JPS54155744A (en) Microprogram control system
JPS5533235A (en) Microprogram control system
JPS5494851A (en) Data processor
JPS6455652A (en) Data processor
JPS56121167A (en) Data processing equipment
JPS5717059A (en) Processor for pipeline control data
JPS55140949A (en) Information processor
JPS5720844A (en) Arithmetic controller
JPS5739449A (en) Microprogram control device
JPS5330243A (en) Arithmetic processor
JPS5553753A (en) Fault process system for information processor
JPS5532208A (en) Memory control system
JPS5355930A (en) Calculator for branch path passing circuit
JPS54139446A (en) Process mode control unit
JPS56152059A (en) Program debugging system
JPS5452951A (en) Processor
JPS55138151A (en) Prevention system for uncontrolled run of program