JPS54155744A - Microprogram control system - Google Patents

Microprogram control system

Info

Publication number
JPS54155744A
JPS54155744A JP6466678A JP6466678A JPS54155744A JP S54155744 A JPS54155744 A JP S54155744A JP 6466678 A JP6466678 A JP 6466678A JP 6466678 A JP6466678 A JP 6466678A JP S54155744 A JPS54155744 A JP S54155744A
Authority
JP
Japan
Prior art keywords
instruction
execution
language
machine
microinstruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6466678A
Other languages
Japanese (ja)
Inventor
Hideo Morisue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6466678A priority Critical patent/JPS54155744A/en
Publication of JPS54155744A publication Critical patent/JPS54155744A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to reduce hardware in volume by executing a lower instruction by a pseudo machine-language instruction as a substitute for a microinstruction at the time of the execution of a higher instruction.
CONSTITUTION: The circuit consists of main memory unit 1, execution part 2, executive sequence control part 3, control memory unit 4, etc., and execution part 2 includes boundary address register 21 discriminating the memory region of unit 1 and hardware boundary check circuit 22. When an microinstruction is instruction X to be processed, the microinstruction is processed by pseudo machine-language instruction string 60 and the head address of instruction string 60 is set to the instruction counter; and firmware mode FF5 is made logic [1] to shift the control to an instruction indicated by instruction counter, and the process is performed in the same way as the decoding execution of a normal machine-language instruction according to the pseudo machine-language instructions stored in the memory region of unit 1. Once the last special instruction of instruction string 60 is decoded, FF5 is made logic [0] and normal machine-language instruction execution starts.
COPYRIGHT: (C)1979,JPO&Japio
JP6466678A 1978-05-29 1978-05-29 Microprogram control system Pending JPS54155744A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6466678A JPS54155744A (en) 1978-05-29 1978-05-29 Microprogram control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6466678A JPS54155744A (en) 1978-05-29 1978-05-29 Microprogram control system

Publications (1)

Publication Number Publication Date
JPS54155744A true JPS54155744A (en) 1979-12-08

Family

ID=13264743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6466678A Pending JPS54155744A (en) 1978-05-29 1978-05-29 Microprogram control system

Country Status (1)

Country Link
JP (1) JPS54155744A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59200345A (en) * 1983-04-26 1984-11-13 Nec Corp Microprogram control system
JPS6037036A (en) * 1983-08-05 1985-02-26 Nec Corp Data processor
JPS6083142A (en) * 1983-10-14 1985-05-11 Nec Corp Microprogram controller
JPS6379134A (en) * 1980-11-24 1988-04-09 テキサス　インスツルメンツ　インコ−ポレイテツド Microprocessor having auxiliary memory

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5056136A (en) * 1973-09-03 1975-05-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5056136A (en) * 1973-09-03 1975-05-16

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6379134A (en) * 1980-11-24 1988-04-09 テキサス　インスツルメンツ　インコ−ポレイテツド Microprocessor having auxiliary memory
JPS59200345A (en) * 1983-04-26 1984-11-13 Nec Corp Microprogram control system
JPS6037036A (en) * 1983-08-05 1985-02-26 Nec Corp Data processor
JPS6083142A (en) * 1983-10-14 1985-05-11 Nec Corp Microprogram controller

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