JPS57103341A - Resin sealed semiconductor device - Google Patents
Resin sealed semiconductor deviceInfo
- Publication number
- JPS57103341A JPS57103341A JP56174579A JP17457981A JPS57103341A JP S57103341 A JPS57103341 A JP S57103341A JP 56174579 A JP56174579 A JP 56174579A JP 17457981 A JP17457981 A JP 17457981A JP S57103341 A JPS57103341 A JP S57103341A
- Authority
- JP
- Japan
- Prior art keywords
- leads
- tab
- holes
- outer frames
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
PURPOSE:To eliminate the floating and lateral displacement of a tab lead by forming a strain absorbing hole at a part of the tab lead forming a lead frame, thereby absorbing the thermal strain produced at the resin sealing time by the deformation of the hole. CONSTITUTION:Parallel leads 4 are formed via a dam 4 for preventing the resin flow between parallel outer frames at both sides of the lead frame 1, and a plurality of leads are projected from the leads 4 toward the tab 5 of the supporting member for placing a semiconductor element 6 disposed between two leads 4. When the tab 5 disposed between the leads is supported by the tab leads 8, 8' bridged between the outer frames, strain absorbing holes 9, 9' are formed at the positions where the leads 8, 8' approaching the outer frames. That is, the holes 9, 9' are annularly formed at the branches A, A'. Thus, the thermal strain caused at the time of sealing the element 6 with resin can be absorbed by the deformation of the holes 9, 9', and floating and displacement do not occur at the leads, 8, 8'.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56174579A JPS57103341A (en) | 1981-11-02 | 1981-11-02 | Resin sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56174579A JPS57103341A (en) | 1981-11-02 | 1981-11-02 | Resin sealed semiconductor device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10208574A Division JPS5129086A (en) | 1974-09-06 | 1974-09-06 | RIIDOFUREEMU |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57103341A true JPS57103341A (en) | 1982-06-26 |
JPS5750068B2 JPS5750068B2 (en) | 1982-10-25 |
Family
ID=15981018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56174579A Granted JPS57103341A (en) | 1981-11-02 | 1981-11-02 | Resin sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57103341A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04350960A (en) * | 1991-05-28 | 1992-12-04 | Fuji Xerox Co Ltd | Semiconductor package |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6076273U (en) * | 1983-10-31 | 1985-05-28 | リズム時計工業株式会社 | Car clock battery voltage display device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4964373A (en) * | 1972-06-23 | 1974-06-21 |
-
1981
- 1981-11-02 JP JP56174579A patent/JPS57103341A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4964373A (en) * | 1972-06-23 | 1974-06-21 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04350960A (en) * | 1991-05-28 | 1992-12-04 | Fuji Xerox Co Ltd | Semiconductor package |
Also Published As
Publication number | Publication date |
---|---|
JPS5750068B2 (en) | 1982-10-25 |
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