JPS5693359A - Semiconductor integrated circuit and manufacture - Google Patents
Semiconductor integrated circuit and manufactureInfo
- Publication number
- JPS5693359A JPS5693359A JP17369779A JP17369779A JPS5693359A JP S5693359 A JPS5693359 A JP S5693359A JP 17369779 A JP17369779 A JP 17369779A JP 17369779 A JP17369779 A JP 17369779A JP S5693359 A JPS5693359 A JP S5693359A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- wiring metal
- condenser
- metal
- dielectric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
Abstract
PURPOSE:To obtain a condenser without limitation in an applied voltage by a method wherein semiconductor elements are formed on an Si substrate and connected with each other by a wiring metal on the first layer, and also part of them is used for a condenser wiring metal on the first layer, and the condenser wiring metal on the second layer is mounted on the first layer condenser wiring metal through a dielectric layer. CONSTITUTION:Prescribed semiconductor elements are formed in a P type Si substrate 1 and an N type layer 2 formed on the substrate 1, the whole surface is covered with an insulation layer 5, and the first layer condenser wiring metal 10 and the first layer wiring metal 11 for connecting the elements with each other are cover-attached on the insulation layer. Then, the first and second dielectric layers 8, 9 which dielectric constans are taken as epsilon1 and epsilon2 respectively with epsilon1>>epsilon2 for the dielectric constants, are lamination-formed on the whole surface including those metals 10 and 11, and the layer 9 is removed using a mask 12. After that, condenser wiring metal 13 on the second layer is cover-attached facing to the metal 10 on the layer 8 and a wiring metal 14 on the second layer is formed facing to the metal 11 on the layer 14 left behind.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17369779A JPS5928056B2 (en) | 1979-12-26 | 1979-12-26 | Manufacturing method of semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17369779A JPS5928056B2 (en) | 1979-12-26 | 1979-12-26 | Manufacturing method of semiconductor integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5693359A true JPS5693359A (en) | 1981-07-28 |
JPS5928056B2 JPS5928056B2 (en) | 1984-07-10 |
Family
ID=15965431
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17369779A Expired JPS5928056B2 (en) | 1979-12-26 | 1979-12-26 | Manufacturing method of semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5928056B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5889854A (en) * | 1981-11-24 | 1983-05-28 | Seiko Epson Corp | Semiconductor device |
JPS60257554A (en) * | 1984-06-04 | 1985-12-19 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
JPS6115359A (en) * | 1984-07-02 | 1986-01-23 | Rohm Co Ltd | Semiconductor device |
US4646126A (en) * | 1983-10-07 | 1987-02-24 | Kabushiki Kaisha Toshiba | Semiconductor device |
JPS62114238A (en) * | 1985-11-13 | 1987-05-26 | Nec Corp | Semiconductor integrated circuit |
-
1979
- 1979-12-26 JP JP17369779A patent/JPS5928056B2/en not_active Expired
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5889854A (en) * | 1981-11-24 | 1983-05-28 | Seiko Epson Corp | Semiconductor device |
US4646126A (en) * | 1983-10-07 | 1987-02-24 | Kabushiki Kaisha Toshiba | Semiconductor device |
JPS60257554A (en) * | 1984-06-04 | 1985-12-19 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
JPS6115359A (en) * | 1984-07-02 | 1986-01-23 | Rohm Co Ltd | Semiconductor device |
JPS62114238A (en) * | 1985-11-13 | 1987-05-26 | Nec Corp | Semiconductor integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS5928056B2 (en) | 1984-07-10 |
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