JPS60257554A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To obtain the same capacitance by a capacitance element having a small area by making film thickness in a region for the capacitance element thinner than that in regions except said region. CONSTITUTION:A gate oxide film 4a, which is interposed between a first polycrystalline Si layer 3 and a second polycrystalline Si layer 5 and forms a capacitance element, is shaped in thickness thinner than a gate oxide film 4b in a section, which is the same layer as the oxide film 4a and does not form the capacitance element. When potential is applied between the first polycrystalline Si layer 3 and the second polycrystalline Si layer 5, charges are stored in the gate oxide film 4a. Since the thickness of the gate oxide film 4a in a region in which the capacitance element is shaped is made thinner than that of the gate oxide film 4b in another region at that time, the capacitance of the capacitance element is made larger than that of a device in which the whole film thickness of a gate oxide film 4 is equalized. Accordingly, the degree of integration of a semiconductor integrated circuit can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor integrated circuit in which the area of a capacitor portion on a device pattern can be reduced without changing the capacitance.

[Prior art]

In conventional semiconductor integrated circuits, two conductor layers are separated by an insulating film with a uniform thickness that takes into account mutual noise, and the thickness of the P3 film where the capacitor is formed is also the same. The capacitance also depended on the thickness of this insulating film. An example of the configuration of this type of circuit will be explained with reference to FIG.

In FIG. 1, 1 is a semiconductor substrate, 2 is a field oxide film, 3 is a first polycrystalline St layer, 4 is a gate oxide film, and 5 is a second polycrystalline S1 layer.

Next, the operation will be explained.

A potential deficiency is provided between the first polycrystalline St layer 3 and the second polycrystalline Si layer 50. At this time, charges are stored in the gate oxide film 4, and the first polycrystalline St layer 3, second polycrystalline Si layer 5, and gate oxide film 4 operate as a capacitor.

This conventional semiconductor integrated circuit is manufactured by depositing a gate oxide film 4 having a uniform thickness after disposing a first polycrystalline St layer 3 as shown in FIG. 2(a), and then depositing a gate oxide film 4 having a uniform thickness. As shown, a second polycrystalline Si layer 5 was further disposed thereon.

Since the conventional semiconductor integrated circuit is constructed as described above, the capacitance of the capacitor depends on the uniform thickness of the gate oxide film 4. 2 thinner film thickness of the oxide film 4 (this will increase the capacitance of the capacitor with the same area, but in order to make the entire thickness of the gate oxide film 4 uniform, the film thickness of the parts other than the capacitive element area will also be thinner). There were drawbacks such as noise and easy transmission.

[Summary of the invention]

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and by creating a structure in which the film thickness in the capacitive element area is thinner than the film thickness in other areas,
The present invention provides a semiconductor integrated circuit that makes it possible to obtain the same capacitance with a capacitive element having a smaller area than that of a conventional capacitive element.

[Embodiments of the invention]

FIG. 3 is a sectional view of a semiconductor integrated circuit showing a seventh embodiment of the present invention. In FIG. 3, 4a is the first polycrystalline S
This gate oxide film 4a is a oxide film interposed between the i layer 3 and the second polycrystalline St layer 5 to form a capacitive element. The gate oxide 8!4b is formed wider than the portion where the gate oxide 8!4b is not formed. Note that 1.2° and 3.5 in the figure are the same as in FIG. 1, so the explanation will be omitted.

According to this invention, the first polycrystalline Sj layer 3 and the second polycrystalline
When a potential is applied between the S1 layer 5, an abrasive charge is stored in the gate oxide film 4a. At this time, since the gate oxide film 4a in the region where the capacitive element is formed is thinner than the gate oxide film 4b in other regions, the capacitance of the capacitive element becomes thicker than that of the conventional one.

FIGS. 4C&) to 4(d) show side sectional views at each step for explaining the method of manufacturing a semiconductor integrated circuit according to the present invention.

First, as shown in FIG. 4(a), a field oxide film 2 is formed on a semiconductor substrate 1. Patterned first polycrystal S
After forming the T layer 3 and forming four uniform gate oxide films thereon, a portion of the gate oxide film 4 is removed by etching on the first polycrystalline St layer 3, as shown in FIG. Only the gate oxide film 4b is formed, and this gate oxide film 4a is further formed.

A gate oxide film 4a4 is formed uniformly on the first polycrystalline St/scion 3 as shown in FIG. A second polycrystalline S1 layer 5 patterned to form a capacitive element is formed.

FIGS. 5(a) to 5(c) are side sectional views showing various steps for explaining another method of manufacturing a semiconductor integrated circuit according to the present invention.

First, as shown in FIG. 5(a), a field oxide film 2 is formed on a semiconductor substrate 1. First polycrystalline SiJ (m3Y formed,
After forming a thin and uniform gate oxide film 4 thereon, the thickness of the gate oxide film 4b is increased by yxi only in the region where the capacitive element is not formed, as shown in FIG. The thickness of the gate oxide film 4a is kept thin. After that, the gate oxide film 4 is removed as shown in FIG.
A second polycrystalline Si layer 5 is formed on the upper surfaces of layers a and 4b.

In addition, in the above embodiment, the first polycrystalline St layer 3 and the second polycrystalline St layer 5 are used as the materials forming the capacitive element, but these are conductive layers made of other materials. Of course it's a good thing.

〔Effect of the invention〕

As explained in detail above, in this invention, the gate oxide film forming the capacitive element is thinner and thinner than the film other than the capacitive element, so a capacitive element with a large capacitance can be obtained with the same planar shape as the conventional one. Therefore, it has the advantage of improving the performance of semiconductor integrated circuits.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a conventional semiconductor integrated circuit 7, and FIG.
a) and (b) are cross-sectional views showing a conventional manufacturing process 7 of a semiconductor integrated circuit, FIG. 3 is a cross-sectional view showing an embodiment of a semiconductor integrated circuit based on this understanding, and FIGS. FIGS. 5(a) to 5(c) are cross-sectional views showing the manufacturing process of the semiconductor integrated circuit of the present invention. In the figure, 1 is a semiconductor substrate, 2 is a field oxide film, 3 is a first polycrystalline St layer, 4.4a and 4b are gate oxide films, and 5 is a second polycrystalline Si layer. Note that the same reference numerals in Figure 1 indicate the same or corresponding parts. Agent Kouri Oiwa (2 others) Figure 1 R Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] In a semiconductor integrated circuit in which a capacitive element is formed by sequentially providing a first conductive layer, a gate dispersion film, and a second conductive layer on a part of a field oxide film formed on a surface of a semiconductor substrate, the capacitive element is formed. The thickness of the gate oxide film in the region where the capacitive element is formed is made thinner than the film thickness in the region other than the region where the capacitive element is formed.y! -Featured semiconductor integrated circuit.