JPH0476947A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To elevate integration density by remarkably increasing effective surface area of a capacitor. CONSTITUTION:On a board is formed a multilayer film which comprises a first polycrystalline silicon film 104, an insulating film 105, and a second polycrystalline silicon film 106. The multilayer film is patterned into the specified shape, and a third polycrystalline silicon film 108 is formed, and the silicon film 104 and the silicon film 105 are connected, and then a storage contact hole 109 is made at one part of the silicon film 105 to expose the insulating film 105. This has the process of removing the insulating film 105 from the contact hole 109 and forming first electrodes 112-1-112-3, the process of forming a capacitor insulating film 110 at the surface of a first electrode, and the process of coating the insulating film 1110 with a conductive film and forming a second capacitor electrode 110.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a capacitor in a semiconductor integrated circuit.

[Conventional technology]

Conventionally, a capacitor provided in a semiconductor device is known to have the structure shown in FIG. After forming the oxide film 2, the element isolation oxide film 2 is formed.
A polycrystalline silicon film containing holon as an impurity is grown on the substrate with a contact hole 3 etched in a part thereof, and is patterned to include the contact hole 3 to form a storage electrode ff! form 12. At this time, a part of the impurity in the polycrystalline silicon film diffuses into the P-type silicon substrate 1 through the contact hole 3 and forms an impurity diffusion layer 7, so that the storage electrode 12 is electrically connected to the P-type silicon substrate. .

A capacitor was manufactured by subsequently performing thermal oxidation to form a capacitor insulating film 10 on the surface of the storage electrode 12, and growing a capacitor electrode 11 made of a polycrystalline silicon film containing impurities over the entire surface.

[Problem to be solved by the invention]

The capacitance of a capacitor produced using the above-mentioned conventional manufacturing method is mainly determined by the area in the planar direction of the storage electrode made of a single-layer film, so in order to reduce the area of the capacitor and increase the degree of integration while ensuring a constant capacitance, it is necessary to The drawback is that you can only get things that are difficult to achieve.

[Means to solve the problem]

A method for manufacturing a semiconductor integrated circuit according to the present invention includes forming a multilayer film consisting of a first polycrystalline silicon film, an insulating film, and a second polycrystalline silicon film on a substrate, and patterning the multilayer film into a predetermined shape. , forming a third polycrystalline silicon film on a side surface of the multilayer film to connect the first polycrystalline silicon film and the second polycrystalline silicon film, and forming a part of the second polycrystalline silicon film. forming an opening to expose the insulating film, and removing the insulating film from the opening to form a first electrode; and forming a capacitor insulating film on the surface of the first electrode. , and forming a second electrode by depositing a conductive film covering the capacitor insulating film.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in order of manufacturing steps to explain one embodiment of the present invention.

First, as shown in FIG. 1(a), a P-type silicon substrate 10
1 is thermally oxidized to grow an element isolation oxide film 102 on the surface. Elements are made using photo erachinkun technology! Oxide film 1
02 is etched to form a contact hole 103 and expose the surface of the P-type silicon substrate 101. On the substrate thus prepared, a first polycrystalline silicon film 104 containing boron as an impurity and having a thickness of 0.3 μm is formed.
．． A 3 μm thick silicon nitride film 105 and a 0.6 μm thick second polycrystalline silicon film 1 further containing boron as an impurity.
After growing a multilayer film consisting of 05, the multilayer film is etched to include the contact 103 using a photo-etching technique. Note that some of the impurities in the first polycrystalline silicon film 104 pass through the contact hole 103 to the P-type silicon substrate 10.
1 to form an impurity diffusion layer 107, the first polycrystalline silicon film 104 is electrically connected to the P-type silicon substrate 1.
Connected to 01.

Next, a thickness of 0.3 μm containing boron as an impurity is applied to the entire surface.
After growing the third polycrystalline silicon film 108, anisotropic etching is performed to form the first polycrystalline silicon film 104, the silicon nitride film 105, and the second polycrystalline silicon film 105, as shown in FIG.
is left on the side surface of the polycrystalline silicon film 106. Through this step, the silicon nitride film 105 is made into the first silicon nitride film 105. Second. It is in a state where it is surrounded by third polycrystalline silicon films 104, 106, and 108.

Subsequently, as shown in FIG. 1C, a storage contact hole 109 is opened in the second polycrystalline silicon film 106 by photoetching, and then the silicon nitride film 105 is removed by isotropic etching.

Thereafter, as shown in FIG. 1(d), thermal oxidation is performed to form a silicon oxide film as a capacitor insulating film 110 on the surface of the polycrystalline silicon film. In this way, the first electrodes (storage electrodes 112-1 to 112-3) of the capacitor
), a capacitor insulating film 110 can be formed.

Next, a polycrystalline silicon film containing boron as an impurity is grown by low pressure CVD to form a capacitor electrode 4fllO (second electrode), completing the formation of the capacitor.

Multilayer capacitors can be manufactured by combining relatively popular manufacturing techniques.

211(a) to 211(c) are cross-sectional views of a semiconductor chip shown in the order of manufacturing steps for explaining an example in which the present invention is applied to the structure of a dynamic random access memory.

First, as shown in FIG. 2(a), a P-type silicon substrate 201
After a device-sized M oxide film 202 is grown on top using the LOCOS oxidation method, gate oxide films 21.3-1, 2 are formed in the device formation region.
Gate electrode 216-1.216- with 13-2 in the lower layer
form 4. Note that other gate electrodes 216-2.2] and 6-3 are formed on the element isolation oxide film 202. After this, when arsenic ions are implanted over the entire surface, the gate voltage! 21.6
-1216-. Diffusion layers 214-12 on both sides of 4.
15-1, 214-2, 215-2 are formed. Next, a silicon oxide film is grown on the entire surface to form a first interlayer insulating film 2.
17, first contact holes 218-1 and 21.8-2 are opened on the diffusion layers 2151 and 215-2, respectively. After that, a first polycrystalline silicon film 204 containing phosphorus as an impurity is formed as in the embodiment. Silicon nitride film 205.
Second polycrystalline silicon film 206 containing phosphorus as an impurity
After growing a three-layer film, it is patterned using photo-etching technology.
A polycrystalline silicon film 208 is grown.

Subsequently, as shown in FIG. 2(b), anisotropic silicon etching is performed to separate the third polycrystalline silicon film 208 from the first polycrystalline silicon M2O4, silicon nitride film 205.
A gate electrode 216-2.2 is left on the side surface of the second polycrystalline silicon film 206, and then a photonotching technique is applied to the gate electrode 216-2.2.
16-3 on the second polycrystalline silicon film 206. Nitride relicon film 205 Processing the first polycrystalline silicon film 204
・Notching. Thereafter, the remaining silicon nitride film 205 is removed by isotropic etching, and then thermal oxidation is performed to remove the first silicon nitride film 205.
-Capacitor insulating film 21 on the surface of the third polycrystalline silicon film
0a and 210b are formed. In this way, the storage electrodes 211-1a to 212-3a, 212 of the two capacitors
-1b to 212-3b, and the respective capacitor insulating films 210a and 210b can be formed.

Subsequently, as shown in FIG. 2(c), a capacitor electrode 21 is formed so as to cover the capacitor insulating films 210a and 210b.
1, a polycrystalline silicon film containing phosphorus as an impurity is grown and patterned, and then BPSG is grown on the entire surface to form a second interlayer insulation g! 219, then the diffusion layer 214-1
．． Etching the second interlayer insulating film 219 on 214-2 to open second contact holes 220-1 and 220-2;
By sputtering and patterning Aρ to form the digit line 221, a dynamic, low-power, random access memory can be manufactured.

In the above explanation, a silicon nitride film is used on the first polycrystalline silicon film, but a silicon oxide film may also be used, and in order to remove the silicon nitride film, a second polycrystalline silicon film is used. Needless to say, the silicon nitride film may be removed after providing a plurality of holes.

〔Effect of the invention〕

As explained above, the present invention provides a first polycrystalline silicon film,
A multilayer film consisting of an insulating film and a second polycrystalline silicon film is grown on a substrate and patterned into a predetermined shape using a photoetching technique, and then a third polycrystalline silicon film is formed on the side surface of the patterned multilayer film. In other words, with the insulating film covered with the first polycrystalline silicon film, the second polycrystalline silicon film, and the third polycrystalline silicon film, a part of the second polycrystalline silicon film is opened, and the insulating film is covered with Remove. Furthermore, by forming a capacitor by growing a conductive film on the surfaces of the first polycrystalline silicon film, the second polycrystalline silicon film, and the third polycrystalline silicon film via a capacitor insulating film, the effective surface area of the capacitor is significantly increased. This has the effect of increasing the integration density.

Furthermore, by forming a capacitor in a dynamic random access memory according to the present invention, a device with low soft errors and a wide operating margin can be realized.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are vertical sectional views shown in the order of manufacturing steps to explain one embodiment of the present invention, and FIGS. 2(a) to (c)
FIG. 3 is a vertical cross-sectional view showing the manufacturing process in order to explain the present invention in detail, and FIG. 3 is a vertical cross-sectional view for explaining a conventional example. 1.101,201...P-type silicon substrate, 2102
．． 202...Element M oxide film, 3.1C)3.Contact hole, 104,204...First polycrystalline silicon film,
105.205...Silicon nitride film, 106.206
...Second polycrystalline silicon film, 7°107...Impurity diffusion layer, 108,208...Third polycrystalline silicon film, 109...Storage contact hole, 10,11
0.210a, 210b-capacitor insulating film, 11,1
11,211...Capacitor electrode, 12,112-1
~112-3, 212-Ia ~212-3a, 212
-1b to 2123b...storage electrode, 213-
1,213-2...gate oxide film, 214-1,21
4-2215-1, 215-2...diffusion layer, 216-
1 to 216-4... Gate electrode, 217... First interlayer insulating film, 218=1,218-2... First contact hole, 219... Second interlayer insulating film, 220-1. 22
0 to 2... second contact hole, 221... digit line.

Claims (1)

[Claims] A multilayer film consisting of a first polycrystalline silicon film, an insulating film, and a second polycrystalline silicon film is formed on a substrate, the multilayer film is patterned into a predetermined shape, and a third film is formed on the side surface of the multilayer film. A polycrystalline silicon film is formed to connect the first polycrystalline silicon film and a second polycrystalline silicon film, and an opening is formed in a portion of the second polycrystalline silicon film to close the insulating film. forming a first electrode by exposing and removing the insulating film from the opening; forming a capacitor insulating film on the surface of the first electrode; and covering the capacitor insulating film with a conductive film. 1. A method of manufacturing a semiconductor device, comprising the steps of: forming a second electrode by attaching the second electrode to the second electrode;