JPS568854A - Package for semiconductor device - Google Patents

Package for semiconductor device

Info

Publication number
JPS568854A
JPS568854A JP8603279A JP8603279A JPS568854A JP S568854 A JPS568854 A JP S568854A JP 8603279 A JP8603279 A JP 8603279A JP 8603279 A JP8603279 A JP 8603279A JP S568854 A JPS568854 A JP S568854A
Authority
JP
Japan
Prior art keywords
semiconductor device
die pad
package
integrated
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8603279A
Other languages
Japanese (ja)
Inventor
Kazuhiro Shimotori
Yasuharu Nagayama
Takao Nakano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8603279A priority Critical patent/JPS568854A/en
Publication of JPS568854A publication Critical patent/JPS568854A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/642Capacitive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To limit the substrate voltage variation within a small value in a semiconductor 1C which is integrated accompanied by a substrate voltage generating circuit without addition of externally added capacitor by a capacitor being integrated within a package. CONSTITUTION:Beneath a die pad region C in a package where packaging materials are piled up, a connecting plate E which is connected with an electrode A0 which is connected with a power source is installed within it. A semiconductor device which is integrated accompanied by a substrate voltage generating circuit has a die pad region covered with a conductor all over it, and on them a semiconductor chip is placed. And for energizing the substrate by a voltage generated on the semiconductor device's surface there is a connection by a wiring material D between die pad regions. In this constitution a capacitor can be formed between the die pad region and the electrode plate E having insulation materials between them. By this consitution a voltage terminal on the semiconductor device's surface have a large capacitance for generating voltages, and a substrate voltage is able to have a small variation.
JP8603279A 1979-07-04 1979-07-04 Package for semiconductor device Pending JPS568854A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8603279A JPS568854A (en) 1979-07-04 1979-07-04 Package for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8603279A JPS568854A (en) 1979-07-04 1979-07-04 Package for semiconductor device

Publications (1)

Publication Number Publication Date
JPS568854A true JPS568854A (en) 1981-01-29

Family

ID=13875314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8603279A Pending JPS568854A (en) 1979-07-04 1979-07-04 Package for semiconductor device

Country Status (1)

Country Link
JP (1) JPS568854A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856454U (en) * 1981-10-09 1983-04-16 日本電気株式会社 digital integrated circuit
JPS5856453U (en) * 1981-10-08 1983-04-16 古野電気株式会社 IC package with built-in bypass capacitor
JPS58500734A (en) * 1981-05-06 1983-05-06 ウエスタ−ン エレクトリツク カムパニ−,インコ−ポレ−テツド Package for semiconductor chips
FR2518811A1 (en) * 1981-12-22 1983-06-24 Avx Corp INTEGRATED CIRCUIT DEVICE IN CERAMIC CONTAINER
JPS5895063U (en) * 1981-12-21 1983-06-28 ニチコン株式会社 hybrid integrated circuit
FR2521780A1 (en) * 1982-01-15 1983-08-19 Avx Corp INTEGRATED CIRCUIT DEVICE HAVING A MEANS FOR INTERNAL DAMPING OF TRANSIENT SIGNALS WITH RESPECT TO SEVERAL ELECTRICAL POWER SOURCES
JPS5995754U (en) * 1982-12-16 1984-06-29 三菱電機株式会社 Stator of rotating electric machine
JPS59178768A (en) * 1983-03-30 1984-10-11 Tdk Corp Composite component parts
US4945399A (en) * 1986-09-30 1990-07-31 International Business Machines Corporation Electronic package with integrated distributed decoupling capacitors
US5031069A (en) * 1989-12-28 1991-07-09 Sundstrand Corporation Integration of ceramic capacitor

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58500734A (en) * 1981-05-06 1983-05-06 ウエスタ−ン エレクトリツク カムパニ−,インコ−ポレ−テツド Package for semiconductor chips
JPS5856453U (en) * 1981-10-08 1983-04-16 古野電気株式会社 IC package with built-in bypass capacitor
JPS5856454U (en) * 1981-10-09 1983-04-16 日本電気株式会社 digital integrated circuit
JPS5895063U (en) * 1981-12-21 1983-06-28 ニチコン株式会社 hybrid integrated circuit
FR2518811A1 (en) * 1981-12-22 1983-06-24 Avx Corp INTEGRATED CIRCUIT DEVICE IN CERAMIC CONTAINER
FR2521780A1 (en) * 1982-01-15 1983-08-19 Avx Corp INTEGRATED CIRCUIT DEVICE HAVING A MEANS FOR INTERNAL DAMPING OF TRANSIENT SIGNALS WITH RESPECT TO SEVERAL ELECTRICAL POWER SOURCES
JPS5995754U (en) * 1982-12-16 1984-06-29 三菱電機株式会社 Stator of rotating electric machine
JPS59178768A (en) * 1983-03-30 1984-10-11 Tdk Corp Composite component parts
JPH0474868B2 (en) * 1983-03-30 1992-11-27
US4945399A (en) * 1986-09-30 1990-07-31 International Business Machines Corporation Electronic package with integrated distributed decoupling capacitors
US5031069A (en) * 1989-12-28 1991-07-09 Sundstrand Corporation Integration of ceramic capacitor

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