JPS5680151A - Production of semiconductor device having plated projecting electrode - Google Patents

Production of semiconductor device having plated projecting electrode

Info

Publication number
JPS5680151A
JPS5680151A JP15683179A JP15683179A JPS5680151A JP S5680151 A JPS5680151 A JP S5680151A JP 15683179 A JP15683179 A JP 15683179A JP 15683179 A JP15683179 A JP 15683179A JP S5680151 A JPS5680151 A JP S5680151A
Authority
JP
Japan
Prior art keywords
projecting
plated
electrode
film
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15683179A
Other languages
Japanese (ja)
Inventor
Seiichiro Sogo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP15683179A priority Critical patent/JPS5680151A/en
Publication of JPS5680151A publication Critical patent/JPS5680151A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
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    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent the occurrence of purple plague phenomenon and breakdown of an insulative film on a semiconductor device having a plated projecting electode by forming a protective insulating film and a projecting electrode on a semiconductor substrate having an Al wiring and securing this to a lead frame or the like to perform wire bonding, before coating the whole surfaces with a glass film. CONSTITUTION:An insulative film 24 is formed on all the semiconductor element surface provided with an Al wiring 25 expect for the part on which a projecting electrode is to be provided. A foundation metal layer 27 for plating is provided and masked with a photoresist layer 28 which has an opening corresponding to the part on which a projecting electrode is to be provided, and a plated projecting-electrode layer 29 is formed in the opening. Then the photoresist layer 28 and the unnecessary foundation metal layer 27 for plating are removed, and a wire 31 is connecte to the plated projecting-electrode layer 29. After the whole surfaces are coated with a deposition film 35 by vaporizing passivation glass, the whole is molded with resin. Said procedure can prevent the occurrence of purple plague phenomenon and breakdown of the insulative film when the Al wiring is provided.
JP15683179A 1979-12-05 1979-12-05 Production of semiconductor device having plated projecting electrode Pending JPS5680151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15683179A JPS5680151A (en) 1979-12-05 1979-12-05 Production of semiconductor device having plated projecting electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15683179A JPS5680151A (en) 1979-12-05 1979-12-05 Production of semiconductor device having plated projecting electrode

Publications (1)

Publication Number Publication Date
JPS5680151A true JPS5680151A (en) 1981-07-01

Family

ID=15636297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15683179A Pending JPS5680151A (en) 1979-12-05 1979-12-05 Production of semiconductor device having plated projecting electrode

Country Status (1)

Country Link
JP (1) JPS5680151A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6320845A (en) * 1986-07-14 1988-01-28 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6320845A (en) * 1986-07-14 1988-01-28 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit

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