JPS5679472A - Preparing method of mos-type semiconductor device - Google Patents

Preparing method of mos-type semiconductor device

Info

Publication number
JPS5679472A
JPS5679472A JP15637979A JP15637979A JPS5679472A JP S5679472 A JPS5679472 A JP S5679472A JP 15637979 A JP15637979 A JP 15637979A JP 15637979 A JP15637979 A JP 15637979A JP S5679472 A JPS5679472 A JP S5679472A
Authority
JP
Japan
Prior art keywords
silicon
poly
sio2
mask
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15637979A
Other languages
Japanese (ja)
Inventor
Yoshihisa Mizutani
Susumu Kayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15637979A priority Critical patent/JPS5679472A/en
Publication of JPS5679472A publication Critical patent/JPS5679472A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To obtain an FET having a high integrated degree by embeding a gate electrode into an insulating layer and setting a poly-silicon or amorphous silicon channel thereon and a source drain at both sides thereof. CONSTITUTION:A poly-silicon 3 is laid on a SiO2 2 on a Si substrate 1. It is oxidized to change to SiO2 32 performing a mask 4. After demasking, it is covered with an oxide film 5 and a N<+> layer 5 is prepared injecting P-ion. Then, the poly- silicon 6 is selectively formed and the P-ion is injected to set the N<+> layer 8, 9 performing a resist mask 7. After removing the mask 7, the LASER is irradiated to activate it. Then, it is covered with SiO2 10 and Al electrodes 111, 112 are made by opening selectively. By this constitution, a smooth construction can be realized with poly-silicon film, thereby being capable of miniaturization and high integration of element without decreasing the reliability. Further, the combination with the conventional construction makes possible to obtain various kinds of devices.
JP15637979A 1979-12-04 1979-12-04 Preparing method of mos-type semiconductor device Pending JPS5679472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15637979A JPS5679472A (en) 1979-12-04 1979-12-04 Preparing method of mos-type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15637979A JPS5679472A (en) 1979-12-04 1979-12-04 Preparing method of mos-type semiconductor device

Publications (1)

Publication Number Publication Date
JPS5679472A true JPS5679472A (en) 1981-06-30

Family

ID=15626457

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15637979A Pending JPS5679472A (en) 1979-12-04 1979-12-04 Preparing method of mos-type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5679472A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140662A (en) * 1980-04-02 1981-11-04 Mitsubishi Electric Corp Manufacture of field effect semiconductor of insulation gate complementary type
JPS60160173A (en) * 1984-01-30 1985-08-21 Sharp Corp Thin film transistor
JPH03265143A (en) * 1990-03-15 1991-11-26 Matsushita Electron Corp Manufacture of thin film transistor
JPH0555254A (en) * 1991-08-27 1993-03-05 Sharp Corp Thin film transistor and manufacture thereof
JPH05136169A (en) * 1992-01-27 1993-06-01 Seiko Epson Corp Manufacture of thin-film transistor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140662A (en) * 1980-04-02 1981-11-04 Mitsubishi Electric Corp Manufacture of field effect semiconductor of insulation gate complementary type
JPH0312475B2 (en) * 1980-04-02 1991-02-20 Mitsubishi Electric Corp
JPS60160173A (en) * 1984-01-30 1985-08-21 Sharp Corp Thin film transistor
JPH03265143A (en) * 1990-03-15 1991-11-26 Matsushita Electron Corp Manufacture of thin film transistor
JPH0555254A (en) * 1991-08-27 1993-03-05 Sharp Corp Thin film transistor and manufacture thereof
JPH05136169A (en) * 1992-01-27 1993-06-01 Seiko Epson Corp Manufacture of thin-film transistor

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