JPS5673451A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5673451A JPS5673451A JP15099279A JP15099279A JPS5673451A JP S5673451 A JPS5673451 A JP S5673451A JP 15099279 A JP15099279 A JP 15099279A JP 15099279 A JP15099279 A JP 15099279A JP S5673451 A JPS5673451 A JP S5673451A
- Authority
- JP
- Japan
- Prior art keywords
- silicide
- film
- layer
- sio2
- side face
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To obtain the multilayer wiring of a semiconductor device having a favorable yield and a high interlayer dielectric strength by a method wherein the first layer electrode wiring is provided with a high melting point metal silicide being added with an impurity, and an oxide film is formed at the side face by heat treatment. CONSTITUTION:A field oxide film 102 and a gate oxide film 103 are formed on the surface of a P type Si substrate 101, and an Mo silicide 104 being added with P, a CVD SiO2 105 are laminated on it. After each layer is etched in order, the exposed surface of the substrate is oxidized by heating to cover it with an SiO2 film 108. At this time, the side face of a gate electrode 106 of the first layer consisting of the Mo silicide is also oxidized by heating forming the SiO2 film mainly from the Si in the MoSi2, but because the oxidizing rate of the Mo silicide being added with P is larger than the film having no P additive, so that the thicker SiO2 film 109 is formed on the side face. Then the whole surface is covered with the Mo silicide, patterning is performed to form the second layer gate electrode 110 and openings are formed in the SiO2 film 108 to form N<+> type source, drain using the electrode 110 as a mask. The wiring of the RAM device obtained by this way has a rapid transmitting speed of signal, and has a high interlayer dielectric strength.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15099279A JPS6038026B2 (en) | 1979-11-21 | 1979-11-21 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15099279A JPS6038026B2 (en) | 1979-11-21 | 1979-11-21 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5673451A true JPS5673451A (en) | 1981-06-18 |
| JPS6038026B2 JPS6038026B2 (en) | 1985-08-29 |
Family
ID=15508909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15099279A Expired JPS6038026B2 (en) | 1979-11-21 | 1979-11-21 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6038026B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60183739A (en) * | 1984-03-01 | 1985-09-19 | Ricoh Co Ltd | Formation of multilayer interconnection |
| US6841439B1 (en) * | 1997-07-24 | 2005-01-11 | Texas Instruments Incorporated | High permittivity silicate gate dielectric |
| US7115461B2 (en) | 1997-07-24 | 2006-10-03 | Texas Instruments Incorporated | High permittivity silicate gate dielectric |
-
1979
- 1979-11-21 JP JP15099279A patent/JPS6038026B2/en not_active Expired
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60183739A (en) * | 1984-03-01 | 1985-09-19 | Ricoh Co Ltd | Formation of multilayer interconnection |
| US6841439B1 (en) * | 1997-07-24 | 2005-01-11 | Texas Instruments Incorporated | High permittivity silicate gate dielectric |
| US7115461B2 (en) | 1997-07-24 | 2006-10-03 | Texas Instruments Incorporated | High permittivity silicate gate dielectric |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6038026B2 (en) | 1985-08-29 |
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