JPS567289A - Memory circuit - Google Patents
Memory circuitInfo
- Publication number
- JPS567289A JPS567289A JP8190079A JP8190079A JPS567289A JP S567289 A JPS567289 A JP S567289A JP 8190079 A JP8190079 A JP 8190079A JP 8190079 A JP8190079 A JP 8190079A JP S567289 A JPS567289 A JP S567289A
- Authority
- JP
- Japan
- Prior art keywords
- data
- decoder
- circuit
- line
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
Landscapes
- Engineering & Computer Science (AREA)
- Databases & Information Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To reduce the chip area and power consumption, by using a data selector circuit to connect write-in and readout data to the selected data bus. CONSTITUTION:When select line Y1 is selected by Y decoder 4, digit lines D1 and D2 are connected to a pair of data busses RB1 and RB2 simultaneously. Respective busses RB are connected to data selector circuit 15, and circuit 15 outputs only information of one data bus line, which is selected by Y decoder 14, through amplifier 21. For write, data is supplied to circuit 15 through amplifier 20, and the data bus line where data should be written is selected by Y decoder 14, and data is transferred and is transferred to only one digit line selected by decoder 4, thus writing in.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8190079A JPS567289A (en) | 1979-06-28 | 1979-06-28 | Memory circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8190079A JPS567289A (en) | 1979-06-28 | 1979-06-28 | Memory circuit |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59248537A Division JPS60150290A (en) | 1984-11-22 | 1984-11-22 | Memory circuit |
JP59248538A Division JPS60150291A (en) | 1984-11-22 | 1984-11-22 | Method for reading out of memory circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS567289A true JPS567289A (en) | 1981-01-24 |
Family
ID=13759308
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8190079A Pending JPS567289A (en) | 1979-06-28 | 1979-06-28 | Memory circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS567289A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57164491A (en) * | 1981-04-02 | 1982-10-09 | Nec Corp | Semiconductor device |
EP0122081A2 (en) * | 1983-03-31 | 1984-10-17 | Fujitsu Limited | Semiconductor memory device |
-
1979
- 1979-06-28 JP JP8190079A patent/JPS567289A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57164491A (en) * | 1981-04-02 | 1982-10-09 | Nec Corp | Semiconductor device |
JPH0143398B2 (en) * | 1981-04-02 | 1989-09-20 | Nippon Electric Co | |
EP0122081A2 (en) * | 1983-03-31 | 1984-10-17 | Fujitsu Limited | Semiconductor memory device |
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