JPS56110131A - Data transfer system of independent completion type microprocessor - Google Patents
Data transfer system of independent completion type microprocessorInfo
- Publication number
- JPS56110131A JPS56110131A JP1343880A JP1343880A JPS56110131A JP S56110131 A JPS56110131 A JP S56110131A JP 1343880 A JP1343880 A JP 1343880A JP 1343880 A JP1343880 A JP 1343880A JP S56110131 A JPS56110131 A JP S56110131A
- Authority
- JP
- Japan
- Prior art keywords
- bit
- address
- word
- memory
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/04—Addressing variable-length words or parts of words
Abstract
PURPOSE:To transfer both the bit and the work to the same memory address, by adding the bit/word control circuit to the data and address bus line between the microprocessor and the memory. CONSTITUTION:At the time of processing of the bit, 1 chip of the bit memories 8a-8h of the memory bank 2a is accessed by the bit decoder 13, also a chip enable signal 17 and a read/write signal 20 access the two-way driver 15, and the bit is transferred. The address of each memory 8a-8h is selected by the address 12. At the time of processing of the word, the decoder 13 is ineffective, and the memories 8a-8h are all accessed by a word access signal 24. At the same time, a chip enable signal 18 and a read/write signal 22 access the two-way but driver 14, and the bit is transferred. In this way, the bit/word processings are executed by only changing the format of the address bus.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1343880A JPS56110131A (en) | 1980-02-06 | 1980-02-06 | Data transfer system of independent completion type microprocessor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1343880A JPS56110131A (en) | 1980-02-06 | 1980-02-06 | Data transfer system of independent completion type microprocessor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56110131A true JPS56110131A (en) | 1981-09-01 |
JPS6232832B2 JPS6232832B2 (en) | 1987-07-16 |
Family
ID=11833127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1343880A Granted JPS56110131A (en) | 1980-02-06 | 1980-02-06 | Data transfer system of independent completion type microprocessor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56110131A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57168347A (en) * | 1981-04-09 | 1982-10-16 | Toshiba Corp | Computer system |
JPS603771A (en) * | 1983-06-22 | 1985-01-10 | Mitsubishi Electric Corp | Interface circuit of programmable controller |
JPS61150007A (en) * | 1984-12-25 | 1986-07-08 | Meidensha Electric Mfg Co Ltd | Programmable controller possible for bit/byte access |
-
1980
- 1980-02-06 JP JP1343880A patent/JPS56110131A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57168347A (en) * | 1981-04-09 | 1982-10-16 | Toshiba Corp | Computer system |
JPS603771A (en) * | 1983-06-22 | 1985-01-10 | Mitsubishi Electric Corp | Interface circuit of programmable controller |
JPS61150007A (en) * | 1984-12-25 | 1986-07-08 | Meidensha Electric Mfg Co Ltd | Programmable controller possible for bit/byte access |
Also Published As
Publication number | Publication date |
---|---|
JPS6232832B2 (en) | 1987-07-16 |
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