JPS57117056A - Microcomputer device - Google Patents
Microcomputer deviceInfo
- Publication number
- JPS57117056A JPS57117056A JP56004317A JP431781A JPS57117056A JP S57117056 A JPS57117056 A JP S57117056A JP 56004317 A JP56004317 A JP 56004317A JP 431781 A JP431781 A JP 431781A JP S57117056 A JPS57117056 A JP S57117056A
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory
- memory units
- same
- prescribed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
Abstract
PURPOSE:To shorten a write time of data, by constituting so that all memory units enter an address area of the same memory unit, in case when the same data is written in all addresses of the memory. CONSTITUTION:At first, a processor 11 accesses prescribed address signals A0- A9 of a low-order 10 bits of a selected memory unit 140, and writes prescribed write data D0-D15 through a data bus. Subsequently, the microprocessor 11 sends out prescribed addresses A0-A9 and initial value data D0-D15 to memory units 140-14n through an address bus and a data bus, respectively. Also, a memory map switching circuit 13 receives an interruption receiving signal, sets all chip selecting signals CE0-CEn to a selected state, and applies then to the memory units 140-14n. In this way, all the memory units 140-14n enter the same address area.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56004317A JPS57117056A (en) | 1981-01-14 | 1981-01-14 | Microcomputer device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56004317A JPS57117056A (en) | 1981-01-14 | 1981-01-14 | Microcomputer device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57117056A true JPS57117056A (en) | 1982-07-21 |
Family
ID=11581091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56004317A Pending JPS57117056A (en) | 1981-01-14 | 1981-01-14 | Microcomputer device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57117056A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6069757A (en) * | 1983-09-27 | 1985-04-20 | Nippon Telegr & Teleph Corp <Ntt> | Memory control circuit |
JPS60202593A (en) * | 1984-03-26 | 1985-10-14 | Fujitsu Ltd | Writing system of random access memory |
JPS6134642A (en) * | 1984-07-27 | 1986-02-18 | Fujitsu Ltd | Access control system to access area |
JPS61105788A (en) * | 1984-10-26 | 1986-05-23 | Furuno Electric Co Ltd | Address selection circuit of microcomputer system |
JPS61153745A (en) * | 1984-12-27 | 1986-07-12 | Fujitsu Ltd | Write controlling system of storage device |
-
1981
- 1981-01-14 JP JP56004317A patent/JPS57117056A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6069757A (en) * | 1983-09-27 | 1985-04-20 | Nippon Telegr & Teleph Corp <Ntt> | Memory control circuit |
JPH0470654B2 (en) * | 1983-09-27 | 1992-11-11 | Nippon Denshin Denwa Kk | |
JPS60202593A (en) * | 1984-03-26 | 1985-10-14 | Fujitsu Ltd | Writing system of random access memory |
JPS6134642A (en) * | 1984-07-27 | 1986-02-18 | Fujitsu Ltd | Access control system to access area |
JPS61105788A (en) * | 1984-10-26 | 1986-05-23 | Furuno Electric Co Ltd | Address selection circuit of microcomputer system |
JPS61153745A (en) * | 1984-12-27 | 1986-07-12 | Fujitsu Ltd | Write controlling system of storage device |
JPH0316652B2 (en) * | 1984-12-27 | 1991-03-06 | Fujitsu Ltd |
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