JPS57198599A - Memory device having redundancy - Google Patents

Memory device having redundancy

Info

Publication number
JPS57198599A
JPS57198599A JP56082115A JP8211581A JPS57198599A JP S57198599 A JPS57198599 A JP S57198599A JP 56082115 A JP56082115 A JP 56082115A JP 8211581 A JP8211581 A JP 8211581A JP S57198599 A JPS57198599 A JP S57198599A
Authority
JP
Japan
Prior art keywords
memory
main memory
auxiliary memory
defective bit
auxiliary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56082115A
Other languages
Japanese (ja)
Inventor
Shinji Saito
Junichi Miyamoto
Taaki Ichise
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56082115A priority Critical patent/JPS57198599A/en
Priority to US06/370,914 priority patent/US4489402A/en
Priority to DE19823215121 priority patent/DE3215121A1/en
Publication of JPS57198599A publication Critical patent/JPS57198599A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE: To make the relief of defective bits possible and to obtain a highly integrated memory, by accessing an auxiliary memory corresponding to a defective bit when the defective bit of the main memory is selected.
CONSTITUTION: A main memory and an auxiliary memory having redundant bits are provided, and program writable elements 131W134 are arranged in intersections between the group of address signal lines A1..., which are outputted from an address input circuit group 15 for designating addresses of the main memory and the auxiliary memory, and the group of word lines WL1WWL5 connected to respective memories of the auxiliary memory. A writing circuit 14 is connected to these elements to access a memory of the auxiliary memory corresponding to a defective bit of the main memory when this defective bit is selected. The first decoding circuit (for the main memory) 11 and the second decoding circuit (for the auxiliary memory) 12 are provided.
COPYRIGHT: (C)1982,JPO&Japio
JP56082115A 1981-04-25 1981-05-29 Memory device having redundancy Pending JPS57198599A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP56082115A JPS57198599A (en) 1981-05-29 1981-05-29 Memory device having redundancy
US06/370,914 US4489402A (en) 1981-04-25 1982-04-22 Semiconductor memory device
DE19823215121 DE3215121A1 (en) 1981-04-25 1982-04-23 SEMICONDUCTOR STORAGE DEVICE

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56082115A JPS57198599A (en) 1981-05-29 1981-05-29 Memory device having redundancy

Publications (1)

Publication Number Publication Date
JPS57198599A true JPS57198599A (en) 1982-12-06

Family

ID=13765403

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56082115A Pending JPS57198599A (en) 1981-04-25 1981-05-29 Memory device having redundancy

Country Status (1)

Country Link
JP (1) JPS57198599A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131300A (en) * 1984-11-27 1986-06-18 モノリシツク　メモリーズ，インコーポレイテツド Method and configuration for disabling and replacing defective memory in prom
JP2007200521A (en) * 2005-12-28 2007-08-09 Semiconductor Energy Lab Co Ltd Nonvolatile memory and writing method thereof, and semiconductor device
US8339832B2 (en) 2005-12-28 2012-12-25 Semiconductor Energy Laboratory Co., Ltd. Write-once nonvolatile memory with redundancy capability

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5384634A (en) * 1976-12-30 1978-07-26 Fujitsu Ltd Ic memory unit device
JPS56100A (en) * 1979-06-15 1981-01-06 Fujitsu Ltd Semiconductor memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5384634A (en) * 1976-12-30 1978-07-26 Fujitsu Ltd Ic memory unit device
JPS56100A (en) * 1979-06-15 1981-01-06 Fujitsu Ltd Semiconductor memory device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131300A (en) * 1984-11-27 1986-06-18 モノリシツク　メモリーズ，インコーポレイテツド Method and configuration for disabling and replacing defective memory in prom
JP2007200521A (en) * 2005-12-28 2007-08-09 Semiconductor Energy Lab Co Ltd Nonvolatile memory and writing method thereof, and semiconductor device
US8339832B2 (en) 2005-12-28 2012-12-25 Semiconductor Energy Laboratory Co., Ltd. Write-once nonvolatile memory with redundancy capability
KR101387376B1 (en) * 2005-12-28 2014-04-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Nonvolatile memory and writing method thereof, and semiconductor device
KR101389288B1 (en) * 2005-12-28 2014-04-25 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Nonvolatile memory and writing method thereof, and semiconductor device

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