JPS5671977A - Preparation method of mis electric field effect semiconductor system - Google Patents

Preparation method of mis electric field effect semiconductor system

Info

Publication number
JPS5671977A
JPS5671977A JP14981479A JP14981479A JPS5671977A JP S5671977 A JPS5671977 A JP S5671977A JP 14981479 A JP14981479 A JP 14981479A JP 14981479 A JP14981479 A JP 14981479A JP S5671977 A JPS5671977 A JP S5671977A
Authority
JP
Japan
Prior art keywords
sio2
film
mask
preparation
electric field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14981479A
Other languages
Japanese (ja)
Inventor
Hiroshi Tokunaga
Nobuo Toyokura
Shinichi Inoue
Toru Shinoki
Hajime Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14981479A priority Critical patent/JPS5671977A/en
Publication of JPS5671977A publication Critical patent/JPS5671977A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To easily obtain a system having no pollution of Na<+>, etc. by a method wherein a source, drain layer is formed by using a gate electrode of a laminated material of a glass film and a high melting point metal as a mask. CONSTITUTION:A field oxide film 2 and a gate oxide film 2G are formed on a P type Si 1 and thereupon, MO3 and CVD-SiO2 4 are laminated and then, a resist mask 5 is applied. A Mo gate electrode 3G is formed through an etching and then, the mask 5 is removed and an ion is injectd to form N<+> layers 6S, 6D. A pollutant on an SiO2 film 4 is removed by lightly performing an etching. Next thereto, a system is coated with a CVD-SiO2 7 after a heat processing in N2, and Al electrodes 8G, 8D, 8S are added. In this way, a glass film 4 is made to remain to trap a pollutant, as a result, the quantity of movable ion in the gate insulating film is sharply reduced, thus, eliminating uneasiness such as an increase of Si-SiO2 interface levels, and a fluctuation of a threshold value voltage due to a voltage applied.
JP14981479A 1979-11-19 1979-11-19 Preparation method of mis electric field effect semiconductor system Pending JPS5671977A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14981479A JPS5671977A (en) 1979-11-19 1979-11-19 Preparation method of mis electric field effect semiconductor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14981479A JPS5671977A (en) 1979-11-19 1979-11-19 Preparation method of mis electric field effect semiconductor system

Publications (1)

Publication Number Publication Date
JPS5671977A true JPS5671977A (en) 1981-06-15

Family

ID=15483284

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14981479A Pending JPS5671977A (en) 1979-11-19 1979-11-19 Preparation method of mis electric field effect semiconductor system

Country Status (1)

Country Link
JP (1) JPS5671977A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53139985A (en) * 1977-05-13 1978-12-06 Nippon Telegr & Teleph Corp <Ntt> Production of mis type transistors
JPS54134579A (en) * 1978-04-11 1979-10-19 Nec Corp Mis semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53139985A (en) * 1977-05-13 1978-12-06 Nippon Telegr & Teleph Corp <Ntt> Production of mis type transistors
JPS54134579A (en) * 1978-04-11 1979-10-19 Nec Corp Mis semiconductor device

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