JPS5671883A - Control system for memory - Google Patents

Control system for memory

Info

Publication number
JPS5671883A
JPS5671883A JP14648379A JP14648379A JPS5671883A JP S5671883 A JPS5671883 A JP S5671883A JP 14648379 A JP14648379 A JP 14648379A JP 14648379 A JP14648379 A JP 14648379A JP S5671883 A JPS5671883 A JP S5671883A
Authority
JP
Japan
Prior art keywords
readout
write
memory
data
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14648379A
Other languages
Japanese (ja)
Inventor
Koji Kuruma
Hideo Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP14648379A priority Critical patent/JPS5671883A/en
Publication of JPS5671883A publication Critical patent/JPS5671883A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Storing Facsimile Image Data (AREA)

Abstract

PURPOSE:To enable the write-in/readout of data of two types of clock rates continously and to perform refresh control, by forming the data write-in/readout cycle through the use of a given clock to the same memory. CONSTITUTION:The data write-in/readout receives control from the level of the signal 21 at a clock generator 18, the write-in/readout cycle in data clock rate 1MHz at high speed side is formed by using the clock rate of 9MHz from an oscillator 19, the readout for the observation of picture from a memory 7 is made at high speed in 1MHz, and the write-in of data in lower speed than the readout is made by using the remaining period used for the readout in the relation of signal 20 and 21. Accordingly, 9-word, 72-bit of memory 7 at high speed readout can parallelly be Accessed, and the readout/write-in can continuously be made to the memory 7 and this state can be observed by a monitor 12.
JP14648379A 1979-11-14 1979-11-14 Control system for memory Pending JPS5671883A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14648379A JPS5671883A (en) 1979-11-14 1979-11-14 Control system for memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14648379A JPS5671883A (en) 1979-11-14 1979-11-14 Control system for memory

Publications (1)

Publication Number Publication Date
JPS5671883A true JPS5671883A (en) 1981-06-15

Family

ID=15408651

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14648379A Pending JPS5671883A (en) 1979-11-14 1979-11-14 Control system for memory

Country Status (1)

Country Link
JP (1) JPS5671883A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60187996A (en) * 1984-03-08 1985-09-25 Fujitsu Ltd Access control system
JPS62232260A (en) * 1986-04-01 1987-10-12 Canon Inc Image data communication equipment
JPH01245669A (en) * 1988-03-25 1989-09-29 Sanyo Electric Co Ltd Image file system
JPH03105788A (en) * 1989-09-19 1991-05-02 Fujitsu Ltd Semiconductor memory device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60187996A (en) * 1984-03-08 1985-09-25 Fujitsu Ltd Access control system
JPS62232260A (en) * 1986-04-01 1987-10-12 Canon Inc Image data communication equipment
JPH01245669A (en) * 1988-03-25 1989-09-29 Sanyo Electric Co Ltd Image file system
JPH03105788A (en) * 1989-09-19 1991-05-02 Fujitsu Ltd Semiconductor memory device

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