JPS56119992A - Dynamic type fixed memory device - Google Patents
Dynamic type fixed memory deviceInfo
- Publication number
- JPS56119992A JPS56119992A JP2371180A JP2371180A JPS56119992A JP S56119992 A JPS56119992 A JP S56119992A JP 2371180 A JP2371180 A JP 2371180A JP 2371180 A JP2371180 A JP 2371180A JP S56119992 A JPS56119992 A JP S56119992A
- Authority
- JP
- Japan
- Prior art keywords
- dynamic type
- circuit
- rom
- memory device
- type fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
Landscapes
- Read Only Memory (AREA)
Abstract
PURPOSE:To obtain a dynamic type ROM of high versatility by providing a required circuit for generating timing signal within a memory chip. CONSTITUTION:A chip of a small size such as a dynamic type ROM part 13, an output latching part 14 and the like is provided on the other hand with a clock generating circuit 11, a timing signal generating circuit 12, etc., and when adress information is sent from a microcomputer, a start signal CE inverts to a low level, and assumes respective steps 151... of a shift register forming the circuit 12, whereby setting is released. The timing signals synchronized with the clocks from the circuit 11 are generated from the predetermined stages by the successive shifting of the respective stages 151 and the ROM part 13 and the latching part 14 are controlled so that the memory contents of the ROM part 13 are read out in correspondence to the address information. Hence, there is no need for making the timing signals differing schema with respect to ROMs on the microcomputer side, and the versatility of the dynamic type fixed memory device is improved.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2371180A JPS56119992A (en) | 1980-02-27 | 1980-02-27 | Dynamic type fixed memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2371180A JPS56119992A (en) | 1980-02-27 | 1980-02-27 | Dynamic type fixed memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56119992A true JPS56119992A (en) | 1981-09-19 |
Family
ID=12117922
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2371180A Pending JPS56119992A (en) | 1980-02-27 | 1980-02-27 | Dynamic type fixed memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56119992A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63244389A (en) * | 1987-03-31 | 1988-10-11 | Toshiba Corp | Semiconductor integrated circuit device |
JPH08279281A (en) * | 1994-08-26 | 1996-10-22 | Sgs Thomson Microelectron Ltd | Timing circuit |
-
1980
- 1980-02-27 JP JP2371180A patent/JPS56119992A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63244389A (en) * | 1987-03-31 | 1988-10-11 | Toshiba Corp | Semiconductor integrated circuit device |
JPH08279281A (en) * | 1994-08-26 | 1996-10-22 | Sgs Thomson Microelectron Ltd | Timing circuit |
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