JPS5621440A - Stuff synchronizing system - Google Patents

Stuff synchronizing system

Info

Publication number
JPS5621440A
JPS5621440A JP9820579A JP9820579A JPS5621440A JP S5621440 A JPS5621440 A JP S5621440A JP 9820579 A JP9820579 A JP 9820579A JP 9820579 A JP9820579 A JP 9820579A JP S5621440 A JPS5621440 A JP S5621440A
Authority
JP
Japan
Prior art keywords
stuff
synchronizing
synchronized
signal
write clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9820579A
Other languages
Japanese (ja)
Inventor
Yozo Fujisaki
Yuzo Fujii
Toshio Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9820579A priority Critical patent/JPS5621440A/en
Publication of JPS5621440A publication Critical patent/JPS5621440A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/073—Bit stuffing, e.g. PDH

Abstract

PURPOSE:To giving flexibility on the system to make it possible to select arbitrarily the stuff rate, by stuff-synchronizing a synchronized signal stepwise through an intermediate synchronizing signal. CONSTITUTION:In transmission side (a), synchronized input signal Fi input by write clock fi is stuff-synchronized by synchronizing clock fo' to generate intermediate synchronizing signal Fo'. Fo' is input to the second stuff synchronizing circuit with write clock fo' and is stuff-synchronized by synchronizing clock fo to generate final synchronizing signal Fo. In receiving side (b), the first destuff circuit is constituted of write clock generator 25 - voltage control oscillator 30, and the second destuff circuit is constituted by write clock generator 35 - voltage control oscillator 40, and by these circuits, demodulation output Fi equal to synchronized input signal Fi in the transmission side is obtained.
JP9820579A 1979-07-31 1979-07-31 Stuff synchronizing system Pending JPS5621440A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9820579A JPS5621440A (en) 1979-07-31 1979-07-31 Stuff synchronizing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9820579A JPS5621440A (en) 1979-07-31 1979-07-31 Stuff synchronizing system

Publications (1)

Publication Number Publication Date
JPS5621440A true JPS5621440A (en) 1981-02-27

Family

ID=14213486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9820579A Pending JPS5621440A (en) 1979-07-31 1979-07-31 Stuff synchronizing system

Country Status (1)

Country Link
JP (1) JPS5621440A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2668323A1 (en) * 1990-10-17 1992-04-24 Telecommunications Sa DEVICE FOR REDUCING GIGUE DUE TO POINTER HOPPING IN A DIGITAL TELECOMMUNICATIONS NETWORK.
JPH04176498A (en) * 1990-11-09 1992-06-24 Matsushita Electric Ind Co Ltd Ironing device
JPH04176499A (en) * 1990-11-09 1992-06-24 Matsushita Electric Ind Co Ltd Ironing device
EP0770292A1 (en) * 1994-07-08 1997-05-02 Transwitch Corporation Two stage clock dejitter circuit for regenerating an e4 telecommunications signal from the data component of an sts-3c signal

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2668323A1 (en) * 1990-10-17 1992-04-24 Telecommunications Sa DEVICE FOR REDUCING GIGUE DUE TO POINTER HOPPING IN A DIGITAL TELECOMMUNICATIONS NETWORK.
US5245636A (en) * 1990-10-17 1993-09-14 Societe Anonyme De Telecommunications Device for reducing jitter caused by pointer adjustments in a digital telecommunication network
JPH04176498A (en) * 1990-11-09 1992-06-24 Matsushita Electric Ind Co Ltd Ironing device
JPH04176499A (en) * 1990-11-09 1992-06-24 Matsushita Electric Ind Co Ltd Ironing device
EP0770292A1 (en) * 1994-07-08 1997-05-02 Transwitch Corporation Two stage clock dejitter circuit for regenerating an e4 telecommunications signal from the data component of an sts-3c signal
EP0770292A4 (en) * 1994-07-08 1999-04-21 Transwitch Corp Two stage clock dejitter circuit for regenerating an e4 telecommunications signal from the data component of an sts-3c signal

Similar Documents

Publication Publication Date Title
ES464023A1 (en) Digital phase lock loop circuit and method
JPS5621440A (en) Stuff synchronizing system
FR2315736A1 (en) Transmission system for periodic signals - includes master clock circuit using two main oscillators and auxiliary oscillators
JPS5757051A (en) Fm stereo receiver
JPS5441651A (en) Digital filter of non-circulation type
JPS53110436A (en) Logic circuit for asynchronous signal synchronization
JPS54154964A (en) Programable counter
JPS5787617A (en) Phase shift circuit
JPS5531360A (en) Demodulator circuit
SU965004A1 (en) Phase start signal recertion device
JPS5366110A (en) Waveform transmitting system
JPS5787643A (en) Clock controlling system
JPS537165A (en) Synchronism detecting circuit of phase control circuit
JPS567527A (en) High speed frequency division circuit
JPS5352041A (en) Digital pll circuit
JPS51129160A (en) Phase sychronize circuit
JPS5654142A (en) Timing generating circuit
JPS53106108A (en) Signal transmitting circuit
JPS5365007A (en) Transmission system for intermittent signal
JPS5321512A (en) Multiplex transmission system
JPS5378152A (en) Variable oscillating circuit
JPS5599818A (en) Phase shift circuit
JPS5216144A (en) Digital synchronous clock generator
JPS52115155A (en) Frequency reducing system
JPS5651127A (en) Synchronizing circuit