JPS54154964A - Programable counter - Google Patents

Programable counter

Info

Publication number
JPS54154964A
JPS54154964A JP6415878A JP6415878A JPS54154964A JP S54154964 A JPS54154964 A JP S54154964A JP 6415878 A JP6415878 A JP 6415878A JP 6415878 A JP6415878 A JP 6415878A JP S54154964 A JPS54154964 A JP S54154964A
Authority
JP
Japan
Prior art keywords
flop
flip
input
preset
preset value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6415878A
Other languages
Japanese (ja)
Other versions
JPS6130451B2 (en
Inventor
Kenji Ichida
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP6415878A priority Critical patent/JPS6130451B2/ja
Publication of JPS54154964A publication Critical patent/JPS54154964A/en
Publication of JPS6130451B2 publication Critical patent/JPS6130451B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
    • H03K23/665—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by presetting

Abstract

PURPOSE:To secure operations in variable speed by using the binary flip-flop at the first step. CONSTITUTION:Input IN is applied to the clock input of binary flip-flop 13, and the output of flip-flop 13 is supplied to 1/5-division circuit 11 via the NAND circuit. Output Q8 of circuit 11 is applied to the clock input of 1/10-division circuit 12. Preset input P2, P4 and P8 are corresponding to preset value 2, 4 and 8 respectively. Preset input P1 corresponding to preset value 1 is applied to give the inhibiting control to the clock input of binary flip-flop 14. Thus, the operation of flip-flop 14 is inhibited when the preset value features an odd number.
JP6415878A 1978-05-29 1978-05-29 Expired JPS6130451B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6415878A JPS6130451B2 (en) 1978-05-29 1978-05-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6415878A JPS6130451B2 (en) 1978-05-29 1978-05-29

Publications (2)

Publication Number Publication Date
JPS54154964A true JPS54154964A (en) 1979-12-06
JPS6130451B2 JPS6130451B2 (en) 1986-07-14

Family

ID=13249974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6415878A Expired JPS6130451B2 (en) 1978-05-29 1978-05-29

Country Status (1)

Country Link
JP (1) JPS6130451B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715527A (en) * 1980-06-25 1982-01-26 Ibm Method of generating pulse
JPS5825723A (en) * 1981-08-08 1983-02-16 Fujitsu Ltd Frequency dividing system
JPS59122024A (en) * 1982-12-27 1984-07-14 Matsushita Electric Ind Co Ltd Programmable frequency divider

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63192943U (en) * 1987-05-30 1988-12-13
JPS63192946U (en) * 1987-05-30 1988-12-13
JPS63192945U (en) * 1987-05-30 1988-12-13

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715527A (en) * 1980-06-25 1982-01-26 Ibm Method of generating pulse
JPS6326925B2 (en) * 1980-06-25 1988-06-01 Intaanashonaru Bijinesu Mashiinzu Corp
JPS5825723A (en) * 1981-08-08 1983-02-16 Fujitsu Ltd Frequency dividing system
JPH0331015B2 (en) * 1981-08-08 1991-05-02 Fujitsu Ltd
JPS59122024A (en) * 1982-12-27 1984-07-14 Matsushita Electric Ind Co Ltd Programmable frequency divider
JPH0156573B2 (en) * 1982-12-27 1989-11-30 Matsushita Electric Ind Co Ltd

Also Published As

Publication number Publication date
JPS6130451B2 (en) 1986-07-14

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