JPS6413189A - Character signal generation circuit - Google Patents

Character signal generation circuit

Info

Publication number
JPS6413189A
JPS6413189A JP62169235A JP16923587A JPS6413189A JP S6413189 A JPS6413189 A JP S6413189A JP 62169235 A JP62169235 A JP 62169235A JP 16923587 A JP16923587 A JP 16923587A JP S6413189 A JPS6413189 A JP S6413189A
Authority
JP
Japan
Prior art keywords
data
fringing
character
shift register
shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62169235A
Other languages
Japanese (ja)
Inventor
Hiroyuki Suzuki
Kazuhide Kawada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62169235A priority Critical patent/JPS6413189A/en
Publication of JPS6413189A publication Critical patent/JPS6413189A/en
Pending legal-status Critical Current

Links

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  • Image Processing (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

PURPOSE: To generate a data signal for a character and its fringing with simplified circuit constitution by providing a storage means which stores 1st data indicating the character to be displayed and data indicating its fringing. CONSTITUTION: This circuit has a memory ROM which stores the fringing data and character data. Then the fringing data and character data are read out of the memory at the same time, and the read fringing data is temporarily stored in a 1st shift register 21 and shifted with a 1st shift clock. The read character data is temporarily stored in a 2nd shift register 22 and shifted with a 2nd shift clock. The 1st and 2nd shift clocks are different in frequency; when the character data is compressed and stored in the memory, the output of the 1st shift register is used as a fringing signal and an expanded character signal is obtained from the 2nd shift register and corrected with the output of the 1st shift register.
JP62169235A 1987-07-06 1987-07-06 Character signal generation circuit Pending JPS6413189A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62169235A JPS6413189A (en) 1987-07-06 1987-07-06 Character signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62169235A JPS6413189A (en) 1987-07-06 1987-07-06 Character signal generation circuit

Publications (1)

Publication Number Publication Date
JPS6413189A true JPS6413189A (en) 1989-01-18

Family

ID=15882738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62169235A Pending JPS6413189A (en) 1987-07-06 1987-07-06 Character signal generation circuit

Country Status (1)

Country Link
JP (1) JPS6413189A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9753751B2 (en) 2010-06-15 2017-09-05 Ab Initio Technology Llc Dynamically loading graph-based computations
US9886319B2 (en) 2009-02-13 2018-02-06 Ab Initio Technology Llc Task managing application for performing tasks based on messages received from a data processing application initiated by the task managing application
US9886241B2 (en) 2013-12-05 2018-02-06 Ab Initio Technology Llc Managing interfaces for sub-graphs
US10108521B2 (en) 2012-11-16 2018-10-23 Ab Initio Technology Llc Dynamic component performance monitoring
US10657134B2 (en) 2015-08-05 2020-05-19 Ab Initio Technology Llc Selecting queries for execution on a stream of real-time data
US10671669B2 (en) 2015-12-21 2020-06-02 Ab Initio Technology Llc Sub-graph interface generation

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9886319B2 (en) 2009-02-13 2018-02-06 Ab Initio Technology Llc Task managing application for performing tasks based on messages received from a data processing application initiated by the task managing application
US10528395B2 (en) 2009-02-13 2020-01-07 Ab Initio Technology Llc Task managing application for performing tasks based on messages received from a data processing application initiated by the task managing application
US9753751B2 (en) 2010-06-15 2017-09-05 Ab Initio Technology Llc Dynamically loading graph-based computations
US10108521B2 (en) 2012-11-16 2018-10-23 Ab Initio Technology Llc Dynamic component performance monitoring
US9886241B2 (en) 2013-12-05 2018-02-06 Ab Initio Technology Llc Managing interfaces for sub-graphs
US10180821B2 (en) 2013-12-05 2019-01-15 Ab Initio Technology Llc Managing interfaces for sub-graphs
US10318252B2 (en) 2013-12-05 2019-06-11 Ab Initio Technology Llc Managing interfaces for sub-graphs
US10901702B2 (en) 2013-12-05 2021-01-26 Ab Initio Technology Llc Managing interfaces for sub-graphs
US10657134B2 (en) 2015-08-05 2020-05-19 Ab Initio Technology Llc Selecting queries for execution on a stream of real-time data
US10671669B2 (en) 2015-12-21 2020-06-02 Ab Initio Technology Llc Sub-graph interface generation

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