JPS57185509A - Monitor devic for programmable controller - Google Patents

Monitor devic for programmable controller

Info

Publication number
JPS57185509A
JPS57185509A JP7191081A JP7191081A JPS57185509A JP S57185509 A JPS57185509 A JP S57185509A JP 7191081 A JP7191081 A JP 7191081A JP 7191081 A JP7191081 A JP 7191081A JP S57185509 A JPS57185509 A JP S57185509A
Authority
JP
Japan
Prior art keywords
monitor
key
display
memory
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7191081A
Other languages
Japanese (ja)
Inventor
Yoshiki Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP7191081A priority Critical patent/JPS57185509A/en
Publication of JPS57185509A publication Critical patent/JPS57185509A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/056—Programming the PLC

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE:To monitor the internal state of the continuous number of points of a memory including an arbitrary number not only for the monitor of the state of data memory only for one point, by using a display means such as an instruction display section. CONSTITUTION:A monitor device displays a memory number of a data memory 12 inputted from a key section 16 to a data display of a display section 17. That is, the key section 16 inputs numerical information. The device includes a continuous point monitor instruction key CC monitoring the contents of a plurality of continuous data memories including a numerical key, a monitor instruction key M indicating the monitor and a set memory number. The memory number information of the data memory 12 set and inputted with the operation of the numerical key of the key section 16 passes through a key readout circuit 18, and the output of a circuit 21 introduced to the display conversion circuit 21 via an address buffer 19 and an address buffer readout circuit 20 is given to the data display of a display section 17 to display the memory number of the data memory 12 set and inputted.
JP7191081A 1981-05-11 1981-05-11 Monitor devic for programmable controller Pending JPS57185509A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7191081A JPS57185509A (en) 1981-05-11 1981-05-11 Monitor devic for programmable controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7191081A JPS57185509A (en) 1981-05-11 1981-05-11 Monitor devic for programmable controller

Publications (1)

Publication Number Publication Date
JPS57185509A true JPS57185509A (en) 1982-11-15

Family

ID=13474161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7191081A Pending JPS57185509A (en) 1981-05-11 1981-05-11 Monitor devic for programmable controller

Country Status (1)

Country Link
JP (1) JPS57185509A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59133610A (en) * 1983-01-19 1984-08-01 Omron Tateisi Electronics Co Programmable controller
JPS62108310A (en) * 1985-11-06 1987-05-19 Mitsubishi Electric Corp Controller for operating panel

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53117181A (en) * 1977-03-23 1978-10-13 Sharp Corp Sequence controller

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53117181A (en) * 1977-03-23 1978-10-13 Sharp Corp Sequence controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59133610A (en) * 1983-01-19 1984-08-01 Omron Tateisi Electronics Co Programmable controller
JPS62108310A (en) * 1985-11-06 1987-05-19 Mitsubishi Electric Corp Controller for operating panel

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